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-rw-r--r--src/target/arm_adi_v5.h9
1 files changed, 9 insertions, 0 deletions
diff --git a/src/target/arm_adi_v5.h b/src/target/arm_adi_v5.h
index cdcf928a..3367588f 100644
--- a/src/target/arm_adi_v5.h
+++ b/src/target/arm_adi_v5.h
@@ -189,6 +189,15 @@ struct adiv5_dap {
/* true if packed transfers are supported by the MEM-AP */
bool packed_transfers;
+
+ /* true if unaligned memory access is not supported by the MEM-AP */
+ bool unaligned_access_bad;
+
+ /* The TI TMS470 and TMS570 series processors use a BE-32 memory ordering
+ * despite lack of support in the ARMv7 architecture. Memory access through
+ * the AHB-AP has strange byte ordering these processors, and we need to
+ * swizzle appropriately. */
+ bool ti_be_32_quirks;
};
/**