diff options
Diffstat (limited to 'contrib/loaders/flash/stm32f1x.S')
| -rw-r--r-- | contrib/loaders/flash/stm32f1x.S | 71 |
1 files changed, 71 insertions, 0 deletions
diff --git a/contrib/loaders/flash/stm32f1x.S b/contrib/loaders/flash/stm32f1x.S new file mode 100644 index 00000000..125c76a6 --- /dev/null +++ b/contrib/loaders/flash/stm32f1x.S @@ -0,0 +1,71 @@ +/*************************************************************************** + * Copyright (C) 2011 by Andreas Fritiofson * + * andreas.fritiofson@gmail.com * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 2 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program; if not, write to the * + * Free Software Foundation, Inc., * + * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. * + ***************************************************************************/ + + .text + .syntax unified + .cpu cortex-m3 + .thumb + .thumb_func + .global write + + /* Params: + * r0 - flash base (in), status (out) + * r1 - count (halfword-16bit) + * r2 - workarea start + * r3 - workarea end + * r4 - target address + * Clobbered: + * r5 - rp + * r6 - wp, tmp + */ + +#define STM32_FLASH_CR_OFFSET 0x10 /* offset of CR register from flash reg base */ +#define STM32_FLASH_SR_OFFSET 0x0c /* offset of SR register from flash reg base */ + +wait_fifo: + ldr r6, [r2, #0] /* read wp */ + cmp r6, #0 /* abort if wp == 0 */ + beq exit + ldr r5, [r2, #4] /* read rp */ + cmp r5, r6 /* wait until rp != wp */ + beq wait_fifo + movs r6, #1 /* set PG flag to enable flash programming */ + str r6, [r0, #STM32_FLASH_CR_OFFSET] + ldrh r6, [r5], #2 /* "*target_address++ = *rp++" */ + strh r6, [r4], #2 +busy: + ldr r6, [r0, #STM32_FLASH_SR_OFFSET] /* wait until BSY flag is reset */ + tst r6, #1 + bne busy + tst r6, #0x14 /* check the error bits */ + bne error + cmp r5, r3 /* wrap rp at end of buffer */ + it cs + addcs r5, r2, #8 + str r5, [r2, #4] /* store rp */ + subs r1, r1, #1 /* decrement halfword count */ + cbz r1, exit /* loop if not done */ + b wait_fifo +error: + movs r0, #0 + str r0, [r2, #2] /* set rp = 0 on error */ +exit: + mov r0, r6 /* return status in r0 */ + bkpt #0 |