diff options
| -rw-r--r-- | src/target/cortex_a.c | 13 | ||||
| -rw-r--r-- | src/target/cortex_a.h | 1 |
2 files changed, 14 insertions, 0 deletions
diff --git a/src/target/cortex_a.c b/src/target/cortex_a.c index 3075055d..6e0e52cf 100644 --- a/src/target/cortex_a.c +++ b/src/target/cortex_a.c @@ -208,6 +208,7 @@ static int cortex_a_init_debug_access(struct target *target) CORTEX_A_MIDR_PARTNUM_SHIFT; switch (cortex_part_num) { + case CORTEX_A7_PARTNUM: case CORTEX_A15_PARTNUM: retval = mem_ap_sel_read_atomic_u32(swjdp, armv7a->debug_ap, armv7a->debug_base + CPUDBG_OSLSR, @@ -2512,6 +2513,18 @@ static int cortex_a_examine_first(struct target *target) return retval; } + /* Unlocking the debug registers */ + if ((cpuid & CORTEX_A_MIDR_PARTNUM_MASK) >> CORTEX_A_MIDR_PARTNUM_SHIFT == + CORTEX_A7_PARTNUM) { + + retval = mem_ap_sel_write_atomic_u32(swjdp, armv7a->debug_ap, + armv7a->debug_base + CPUDBG_OSLAR, + 0); + + if (retval != ERROR_OK) + return retval; + + } retval = mem_ap_sel_read_atomic_u32(swjdp, armv7a->debug_ap, armv7a->debug_base + CPUDBG_PRSR, &dbg_osreg); diff --git a/src/target/cortex_a.h b/src/target/cortex_a.h index 043d96f9..94d80f92 100644 --- a/src/target/cortex_a.h +++ b/src/target/cortex_a.h @@ -35,6 +35,7 @@ #define CORTEX_A_COMMON_MAGIC 0x411fc082 #define CORTEX_A15_COMMON_MAGIC 0x413fc0f1 +#define CORTEX_A7_PARTNUM 0xc07 #define CORTEX_A8_PARTNUM 0xc08 #define CORTEX_A9_PARTNUM 0xc09 #define CORTEX_A15_PARTNUM 0xc0f |