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-rw-r--r--src/target/mips_ejtag.c2
-rw-r--r--src/target/mips_ejtag.h2
2 files changed, 2 insertions, 2 deletions
diff --git a/src/target/mips_ejtag.c b/src/target/mips_ejtag.c
index 0b8122e1..6d35e211 100644
--- a/src/target/mips_ejtag.c
+++ b/src/target/mips_ejtag.c
@@ -349,7 +349,7 @@ static void ejtag_main_print_imp(struct mips_ejtag *ejtag_info)
EJTAG_IMP_HAS(EJTAG_IMP_ASID6) ? " ASID_6" : "",
EJTAG_IMP_HAS(EJTAG_IMP_MIPS16) ? " MIPS16" : "",
EJTAG_IMP_HAS(EJTAG_IMP_NODMA) ? " noDMA" : " DMA",
- EJTAG_IMP_HAS(EJTAG_DCR_MIPS64) ? " MIPS64" : " MIPS32");
+ EJTAG_IMP_HAS(EJTAG_IMP_MIPS64) ? " MIPS64" : " MIPS32");
switch (ejtag_info->ejtag_version) {
case EJTAG_VERSION_20:
diff --git a/src/target/mips_ejtag.h b/src/target/mips_ejtag.h
index cfba0ab5..ace3d281 100644
--- a/src/target/mips_ejtag.h
+++ b/src/target/mips_ejtag.h
@@ -130,7 +130,7 @@
/* v2.0 - 1:4 Number of Break Channels. */
#define EJTAG_V20_IMP_BCHANNELS_MASK 0xf
#define EJTAG_V20_IMP_BCHANNELS_SHIFT 1
-#define EJTAG_DCR_MIPS64 (1 << 0)
+#define EJTAG_IMP_MIPS64 (1 << 0)
/* Debug Control Register DCR */
#define EJTAG_DCR 0xFF300000