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-rw-r--r--src/target/Makefile.am4
-rw-r--r--src/target/qorivva.c193
-rw-r--r--src/target/qorivva.h68
-rw-r--r--src/target/target.c2
4 files changed, 267 insertions, 0 deletions
diff --git a/src/target/Makefile.am b/src/target/Makefile.am
index 30d2339b..b03dfd48 100644
--- a/src/target/Makefile.am
+++ b/src/target/Makefile.am
@@ -25,6 +25,7 @@ noinst_LTLIBRARIES += %D%/libtarget.la
$(INTEL_IA32_SRC) \
$(ESIRISC_SRC) \
$(ARC_SRC) \
+ $(QORIVVA_SRC) \
%D%/avrt.c \
%D%/dsp563xx.c \
%D%/dsp563xx_once.c \
@@ -163,6 +164,9 @@ ARC_SRC = \
%D%/arc_jtag.c \
%D%/arc_mem.c
+QORIVVA_SRC = \
+ %D%/qorivva.c
+
%C%_libtarget_la_SOURCES += \
%D%/algorithm.h \
%D%/arm.h \
diff --git a/src/target/qorivva.c b/src/target/qorivva.c
new file mode 100644
index 00000000..027858e5
--- /dev/null
+++ b/src/target/qorivva.c
@@ -0,0 +1,193 @@
+/***************************************************************************
+ * Copyright (C) 2008 by Spencer Oliver *
+ * spen@spen-soft.co.uk *
+ * *
+ * Copyright (C) 2008 by David T.L. Wong *
+ * *
+ * Copyright (C) 2009 by David N. Claffey <dnclaffey@gmail.com> *
+ * *
+ * Copyright (C) 2011 by Drasko DRASKOVIC *
+ * drasko.draskovic@gmail.com *
+ * *
+ * This program is free software; you can redistribute it and/or modify *
+ * it under the terms of the GNU General Public License as published by *
+ * the Free Software Foundation; either version 2 of the License, or *
+ * (at your option) any later version. *
+ * *
+ * This program is distributed in the hope that it will be useful, *
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of *
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
+ * GNU General Public License for more details. *
+ * *
+ * You should have received a copy of the GNU General Public License *
+ * along with this program. If not, see <http://www.gnu.org/licenses/>. *
+ ***************************************************************************/
+
+#ifdef HAVE_CONFIG_H
+#include "config.h"
+#endif
+
+#include "breakpoints.h"
+#include "qorivva.h"
+#include "register.h"
+#include "smp.h"
+
+static void qorivva_set_instr(struct qorivva_common *qorivva, uint32_t new_instr)
+{
+ struct jtag_tap *tap = qorivva->tap;
+
+ assert(tap != NULL);
+ if (buf_get_u32(tap->cur_instr, 0, tap->ir_length) != new_instr) {
+
+ struct scan_field field;
+ field.num_bits = tap->ir_length;
+
+ uint8_t t[4] = { 0 };
+ field.out_value = t;
+ buf_set_u32(t, 0, field.num_bits, new_instr);
+
+ field.in_value = NULL;
+
+ jtag_add_ir_scan(tap, &field, TAP_IDLE);
+ }
+}
+
+static int qorivva_capture_ir(struct qorivva_common *qorivva, uint32_t *ir)
+{
+ struct jtag_tap *tap = qorivva->tap;
+ uint8_t t[4];
+
+ assert(tap != NULL);
+ assert((size_t)tap->ir_length <= sizeof(t) * 8);
+ buf_set_ones(t, tap->ir_length);
+ struct scan_field field;
+ field.num_bits = tap->ir_length;
+ field.out_value = t;
+ field.in_value = t;
+ jtag_add_plain_ir_scan(field.num_bits, field.out_value, field.in_value, TAP_IDLE);
+ keep_alive();
+ int retval = jtag_execute_queue();
+ if (retval != ERROR_OK) {
+ LOG_ERROR("ir read failed");
+ return retval;
+ }
+ *ir = buf_get_u32(t, 0, 32);
+ return ERROR_OK;
+}
+
+static void qorivva_drscan_32_queued(struct qorivva_common *qorivva, uint32_t data_out, uint8_t *data_in)
+{
+ assert(qorivva->tap != NULL);
+ struct jtag_tap *tap = qorivva->tap;
+
+ struct scan_field field;
+ field.num_bits = 32;
+
+ uint8_t scan_out[4] = { 0 };
+ field.out_value = scan_out;
+ buf_set_u32(scan_out, 0, field.num_bits, data_out);
+
+ field.in_value = data_in;
+ jtag_add_dr_scan(tap, 1, &field, TAP_IDLE);
+
+ keep_alive();
+}
+
+static int qorivva_drscan_32(struct qorivva_common *qorivva, uint32_t *data)
+{
+ uint8_t scan_in[4];
+ qorivva_drscan_32_queued(qorivva, *data, scan_in);
+
+ int retval = jtag_execute_queue();
+ if (retval != ERROR_OK) {
+ LOG_ERROR("register read failed");
+ return retval;
+ }
+
+ *data = buf_get_u32(scan_in, 0, 32);
+ return ERROR_OK;
+}
+
+static int qorivva_poll(struct target *target)
+{
+ struct qorivva_common *qorivva = target_to_qorivva(target);
+ uint32_t ir;
+ int retval = qorivva_capture_ir(qorivva, &ir);
+ if (retval != ERROR_OK) {
+ return retval;
+ }
+ //LOG_INFO("captured ir:0x%x", ir);
+ return ERROR_OK;
+}
+
+static int qorivva_target_create(struct target *target, Jim_Interp *interp)
+{
+ struct qorivva_common *qorivva = calloc(1, sizeof(struct qorivva_common));
+
+ qorivva->common_magic = QORIVVA_COMMON_MAGIC;
+ qorivva->tap = target->tap;
+ target->arch_info = qorivva;
+ return ERROR_OK;
+}
+
+static int qorivva_init_target(struct command_context *cmd_ctx,
+ struct target *target)
+{
+ return ERROR_OK;
+}
+
+static int qorivva_examine(struct target *target)
+{
+ struct qorivva_common *qorivva = target_to_qorivva(target);
+
+ if (!target_was_examined(target)) {
+ qorivva_set_instr(qorivva, QORIVVA_INST_IDCODE);
+ qorivva->idcode = 0;
+ int retval = qorivva_drscan_32(qorivva, &qorivva->idcode);
+ if (retval != ERROR_OK) {
+ LOG_ERROR("idcode read failed");
+ return retval;
+ }
+ // TODO: check qorivva->idcode?
+ // Let's talk to the first e200Z4 core, we could also do TAP_PARALLEL to talk
+ // to both Z4 cores and the Z2 core.
+ qorivva_set_instr(qorivva, QORIVVA_INST_AUX_TAP_Z4A);
+ // OnCE has a 10-bit IR
+ qorivva->tap->ir_length = 10;
+ target_set_examined(target);
+ }
+ return ERROR_OK;
+}
+
+struct target_type qorivva_target = {
+ .name = "qorivva",
+
+ .poll = qorivva_poll,
+ //.arch_state = qorivva_arch_state,
+
+ //.halt = qorivva_halt,
+ //.resume = qorivva_resume,
+ //.step = qorivva_step,
+
+ //.assert_reset = qorivva_assert_reset,
+ //.deassert_reset = qorivva_deassert_reset,
+
+ //.get_gdb_reg_list = qorivva_get_gdb_reg_list,
+
+ //.read_memory = qorivva_read_memory,
+ //.write_memory = qorivva_write_memory,
+ //.checksum_memory = qorivva_checksum_memory,
+ //.blank_check_memory = qorivva_blank_check_memory,
+
+ //.run_algorithm = qorivva_run_algorithm,
+
+ //.add_breakpoint = qorivva_add_breakpoint,
+ //.remove_breakpoint = qorivva_remove_breakpoint,
+ //.add_watchpoint = qorivva_add_watchpoint,
+ //.remove_watchpoint = qorivva_remove_watchpoint,
+
+ //.commands = qorivva_command_handlers,
+ .target_create = qorivva_target_create,
+ .init_target = qorivva_init_target,
+ .examine = qorivva_examine,
+};
diff --git a/src/target/qorivva.h b/src/target/qorivva.h
new file mode 100644
index 00000000..3a0a974d
--- /dev/null
+++ b/src/target/qorivva.h
@@ -0,0 +1,68 @@
+/***************************************************************************
+ * Copyright (C) 2008 by Spencer Oliver *
+ * spen@spen-soft.co.uk *
+ * *
+ * Copyright (C) 2008 by David T.L. Wong *
+ * *
+ * Copyright (C) 2011 by Drasko DRASKOVIC *
+ * drasko.draskovic@gmail.com *
+ * *
+ * This program is free software; you can redistribute it and/or modify *
+ * it under the terms of the GNU General Public License as published by *
+ * the Free Software Foundation; either version 2 of the License, or *
+ * (at your option) any later version. *
+ * *
+ * This program is distributed in the hope that it will be useful, *
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of *
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
+ * GNU General Public License for more details. *
+ * *
+ * You should have received a copy of the GNU General Public License *
+ * along with this program. If not, see <http://www.gnu.org/licenses/>. *
+ ***************************************************************************/
+
+#ifndef OPENOCD_TARGET_QORIVVA_H
+#define OPENOCD_TARGET_QORIVVA_H
+
+#include <jtag/jtag.h>
+#include "target.h"
+#include "target_type.h"
+
+#define QORIVVA_COMMON_MAGIC 0x55AA50AF
+
+/* tap instructions */
+#define QORIVVA_INST_IDCODE 0x01
+#define QORIVVA_INST_SAMPLE_PRELOAD 0x02
+#define QORIVVA_INST_SAMPLE 0x03
+#define QORIVVA_INST_EXTEST 0x04
+#define QORIVVA_INST_ENABLE_JTAG_PASSWORD 0x07
+#define QORIVVA_INST_HIGHZ 0x09
+#define QORIVVA_INST_CLAMP 0x0C
+#define QORIVVA_INST_ENABLE_CONTROL1 0x0E
+#define QORIVVA_INST_AUX_TAP_NPC_0 0x21
+#define QORIVVA_INST_AUX_TAP_NPC_1 0x22
+#define QORIVVA_INST_AUX_TAP_MBIST 0x24
+#define QORIVVA_INST_AUX_TAP_JDC 0x26
+#define QORIVVA_INST_AUX_TAP_HSM 0x27
+#define QORIVVA_INST_AUX_TAP_Z4A 0x28
+#define QORIVVA_INST_AUX_TAP_Z4B 0x29
+#define QORIVVA_INST_AUX_TAP_Z2 0x2A
+#define QORIVVA_INST_AUX_TAP_NXMC 0x34
+#define QORIVVA_INST_AUX_TAP_PARALLEL 0x3C
+#define QORIVVA_INST_BYPASS 0xFF
+
+struct qorivva_common {
+ uint32_t common_magic;
+ struct jtag_tap *tap;
+ uint32_t idcode;
+};
+
+static inline struct qorivva_common *
+target_to_qorivva(struct target *target)
+{
+ return target->arch_info;
+}
+
+//extern const struct command_registration qorivva_command_handlers[];
+
+#endif /* OPENOCD_TARGET_QORIVVA_H */
diff --git a/src/target/target.c b/src/target/target.c
index ceecaee1..ec9923be 100644
--- a/src/target/target.c
+++ b/src/target/target.c
@@ -112,6 +112,7 @@ extern struct target_type riscv_target;
extern struct target_type mem_ap_target;
extern struct target_type esirisc_target;
extern struct target_type arcv2_target;
+extern struct target_type qorivva_target;
static struct target_type *target_types[] = {
&arm7tdmi_target,
@@ -148,6 +149,7 @@ static struct target_type *target_types[] = {
&mem_ap_target,
&esirisc_target,
&arcv2_target,
+ &qorivva_target,
#if BUILD_TARGET64
&aarch64_target,
&mips_mips64_target,
generated by cgit v1.2.3-18-g5258 (git 2.32.0) at 2024-10-16 11:24:15 +0000