diff options
| -rw-r--r-- | tcl/target/renesas_s7g2.cfg | 50 |
1 files changed, 50 insertions, 0 deletions
diff --git a/tcl/target/renesas_s7g2.cfg b/tcl/target/renesas_s7g2.cfg new file mode 100644 index 00000000..a09377b2 --- /dev/null +++ b/tcl/target/renesas_s7g2.cfg @@ -0,0 +1,50 @@ +# +# Renesas Synergy S7 G2 w/ ARM Cortex-M4 @ 240 MHz +# + +if { [info exists CHIPNAME] } { + set _CHIPNAME $CHIPNAME +} else { + set _CHIPNAME s7g2 +} + +if { [info exists CPU_JTAG_TAPID] } { + set _CPU_JTAG_TAPID $CPU_JTAG_TAPID +} else { + set _CPU_JTAG_TAPID 0x5ba00477 +} + +if { [info exists CPU_SWD_TAPID] } { + set _CPU_SWD_TAPID $CPU_SWD_TAPID +} else { + set _CPU_SWD_TAPID 0x5ba02477 +} + +source [find target/swj-dp.tcl] + +if { [using_jtag] } { + set _CPU_TAPID $_CPU_JTAG_TAPID +} else { + set _CPU_TAPID $_CPU_SWD_TAPID +} + +swj_newdap $_CHIPNAME cpu -irlen 4 -expected-id $_CPU_TAPID + +set _TARGETNAME $_CHIPNAME.cpu +target create $_TARGETNAME cortex_m -chain-position $_TARGETNAME + +if { [info exists WORKAREASIZE] } { + set _WORKAREASIZE $WORKAREASIZE +} else { + # 640 KB On-Chip SRAM + set _WORKAREASIZE 0xa0000 +} + +$_TARGETNAME configure -work-area-phys 0x1ffe0000 \ + -work-area-size $_WORKAREASIZE -work-area-backup 0 + +if { ![using_hla] } { + cortex_m reset_config sysresetreq +} + +adapter_khz 1000 |