diff options
| -rw-r--r-- | src/target/mips32.c | 4 | ||||
| -rw-r--r-- | src/target/mips32.h | 2 | ||||
| -rw-r--r-- | src/target/mips_m4k.c | 2 |
3 files changed, 5 insertions, 3 deletions
diff --git a/src/target/mips32.c b/src/target/mips32.c index 32924465..8c779864 100644 --- a/src/target/mips32.c +++ b/src/target/mips32.c @@ -384,7 +384,7 @@ int mips32_init_arch_info(struct target *target, struct mips32_common *mips32, s mips32->read_core_reg = mips32_read_core_reg; mips32->write_core_reg = mips32_write_core_reg; - mips32->ejtag_info.scan_delay = 2000000; /* Initial default value */ + mips32->ejtag_info.scan_delay = MIPS32_SCAN_DELAY_LEGACY_MODE; /* Initial default value */ mips32->ejtag_info.mode = 0; /* Initial default value */ return ERROR_OK; @@ -911,7 +911,7 @@ COMMAND_HANDLER(mips32_handle_scan_delay_command) return ERROR_COMMAND_SYNTAX_ERROR; command_print(CMD_CTX, "scan delay: %d nsec", ejtag_info->scan_delay); - if (ejtag_info->scan_delay >= 2000000) { + if (ejtag_info->scan_delay >= MIPS32_SCAN_DELAY_LEGACY_MODE) { ejtag_info->mode = 0; command_print(CMD_CTX, "running in legacy mode"); } else { diff --git a/src/target/mips32.h b/src/target/mips32.h index bfd2cf56..8362f5e6 100644 --- a/src/target/mips32.h +++ b/src/target/mips32.h @@ -61,6 +61,8 @@ #define MIPS32_ARCH_REL1 0x0 #define MIPS32_ARCH_REL2 0x1 +#define MIPS32_SCAN_DELAY_LEGACY_MODE 2000000 + /* offsets into mips32 core register cache */ enum { MIPS32_PC = 37, diff --git a/src/target/mips_m4k.c b/src/target/mips_m4k.c index 0daa71c5..db69b95b 100644 --- a/src/target/mips_m4k.c +++ b/src/target/mips_m4k.c @@ -1339,7 +1339,7 @@ COMMAND_HANDLER(mips_m4k_handle_scan_delay_command) return ERROR_COMMAND_SYNTAX_ERROR; command_print(CMD_CTX, "scan delay: %d nsec", ejtag_info->scan_delay); - if (ejtag_info->scan_delay >= 2000000) { + if (ejtag_info->scan_delay >= MIPS32_SCAN_DELAY_LEGACY_MODE) { ejtag_info->mode = 0; command_print(CMD_CTX, "running in legacy mode"); } else { |