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authorSpencer Oliver <spen@spen-soft.co.uk>2014-01-11 23:14:13 +0000
committerSpencer Oliver <spen@spen-soft.co.uk>2014-01-20 13:26:50 +0000
commite18c958e8283447fc4c25a85ecea833d73d77ca9 (patch)
tree2abdfdc669bad56e2ab6bdd51db3cd1e2fc85030 /tcl
parent009f5c2af0b35d8551aa422475482d2da09675f2 (diff)
cfg: add Freescale FRDM-KL46Z Board
Change-Id: Ib585728f13a380eeeb2ada095f3e1a1c2aaf44cb Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk> Reviewed-on: http://openocd.zylin.com/1866 Tested-by: jenkins Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Diffstat (limited to 'tcl')
-rw-r--r--tcl/board/frdm-kl46z.cfg13
-rw-r--r--tcl/target/kl46.cfg48
2 files changed, 61 insertions, 0 deletions
diff --git a/tcl/board/frdm-kl46z.cfg b/tcl/board/frdm-kl46z.cfg
new file mode 100644
index 00000000..16ffa8d6
--- /dev/null
+++ b/tcl/board/frdm-kl46z.cfg
@@ -0,0 +1,13 @@
+# This is an Freescale Freedom eval board with a single MKL46Z256VLL4 chip.
+# http://www.freescale.com/webapp/sps/site/prod_summary.jsp?code=FRDM-KL46Z
+#
+
+source [find interface/cmsis-dap.cfg]
+
+# increase working area to 16KB
+set WORKAREASIZE 0x4000
+
+# chip name
+set CHIPNAME MKL46Z256VLL4
+
+source [find target/kl46.cfg]
diff --git a/tcl/target/kl46.cfg b/tcl/target/kl46.cfg
new file mode 100644
index 00000000..156ae9f2
--- /dev/null
+++ b/tcl/target/kl46.cfg
@@ -0,0 +1,48 @@
+#
+# Freescale Kinetis KL46 devices
+#
+
+#
+# KL46 devices supports SWD transport only.
+#
+source [find target/swj-dp.tcl]
+
+if { [info exists CHIPNAME] } {
+ set _CHIPNAME $CHIPNAME
+} else {
+ set _CHIPNAME kl46
+}
+
+if { [info exists ENDIAN] } {
+ set _ENDIAN $ENDIAN
+} else {
+ set _ENDIAN little
+}
+
+# Work-area is a space in RAM used for flash programming
+# By default use 4kB
+if { [info exists WORKAREASIZE] } {
+ set _WORKAREASIZE $WORKAREASIZE
+} else {
+ set _WORKAREASIZE 0x1000
+}
+
+if { [info exists CPUTAPID] } {
+ set _CPUTAPID $CPUTAPID
+} else {
+ set _CPUTAPID 0x0bc11477
+}
+
+swj_newdap $_CHIPNAME cpu -irlen 4 -expected-id $_CPUTAPID
+
+set _TARGETNAME $_CHIPNAME.cpu
+target create $_TARGETNAME cortex_m -endian $_ENDIAN -chain-position $_CHIPNAME.cpu
+
+$_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size $_WORKAREASIZE -work-area-backup 0
+
+set _FLASHNAME $_CHIPNAME.flash
+flash bank $_FLASHNAME kinetis 0 0 0 0 $_TARGETNAME
+
+# if srst is not fitted use SYSRESETREQ to
+# perform a soft reset
+cortex_m reset_config sysresetreq