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authorSpencer Oliver <spen@spen-soft.co.uk>2013-12-19 21:33:19 +0000
committerSpencer Oliver <spen@spen-soft.co.uk>2014-01-09 15:20:51 +0000
commit4dc8cd201c667bac72bc083ef1fa1b285eb093fc (patch)
treedeefe8349199480a80a8defcbf42d7b4f9c5f18a /tcl
parent4bff54ccf455fbdfd2bdf9aa371c79f267d486d9 (diff)
cmsis-dap: add initial cmsis-dap support
This is based on work from: https://github.com/TheShed/OpenOCD-CMSIS-DAP/tree/cmsis-dap Main changes include moving over to using HIDAPI rather than libusb-1.0 and cleaning up to merge into master. Support for reset using srst has also been added. It has been tested on all the mbed boards as well as the Freedom board from Freescale. These boards only implement SWD mode, however JTAG mode has been tested with a Keil ULINK2 and a stm32 target - but requires a lot more work. Change-Id: I96d5ee1993bc9c0526219ab754c5aad3b55d812d Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk> Signed-off-by: Andrey Yurovsky <yurovsky@gmail.com> Reviewed-on: http://openocd.zylin.com/1542 Tested-by: jenkins
Diffstat (limited to 'tcl')
-rw-r--r--tcl/board/frdm-kl25z.cfg13
-rw-r--r--tcl/board/mbed-lpc11u24.cfg13
-rw-r--r--tcl/board/mbed-lpc1768.cfg7
-rw-r--r--tcl/interface/cmsis-dap.cfg7
-rw-r--r--tcl/target/kl25.cfg48
-rw-r--r--tcl/target/lpc11uxx.cfg48
-rw-r--r--tcl/target/lpc17xx.cfg10
-rw-r--r--tcl/target/swj-dp.tcl11
8 files changed, 150 insertions, 7 deletions
diff --git a/tcl/board/frdm-kl25z.cfg b/tcl/board/frdm-kl25z.cfg
new file mode 100644
index 00000000..40896e52
--- /dev/null
+++ b/tcl/board/frdm-kl25z.cfg
@@ -0,0 +1,13 @@
+# This is an Freescale Freedom eval board with a single MKL25Z128VLK4 chip.
+# http://www.freescale.com/webapp/sps/site/prod_summary.jsp?code=FRDM-KL25Z
+#
+
+source [find interface/cmsis-dap.cfg]
+
+# increase working area to 16KB
+set WORKAREASIZE 0x4000
+
+# chip name
+set CHIPNAME MKL25Z128VLK4
+
+source [find target/kl25.cfg]
diff --git a/tcl/board/mbed-lpc11u24.cfg b/tcl/board/mbed-lpc11u24.cfg
new file mode 100644
index 00000000..6a582645
--- /dev/null
+++ b/tcl/board/mbed-lpc11u24.cfg
@@ -0,0 +1,13 @@
+# This is an mbed eval board with a single NXP LPC11U24 chip.
+# http://mbed.org/handbook/mbed-NXP-LPC11U24
+#
+
+source [find interface/cmsis-dap.cfg]
+
+# increase working area to 8KB
+set WORKAREASIZE 0x2000
+
+# chip name
+set CHIPNAME lpc11u24
+
+source [find target/lpc11uxx.cfg]
diff --git a/tcl/board/mbed-lpc1768.cfg b/tcl/board/mbed-lpc1768.cfg
new file mode 100644
index 00000000..9cca30cf
--- /dev/null
+++ b/tcl/board/mbed-lpc1768.cfg
@@ -0,0 +1,7 @@
+# This is an mbed eval board with a single NXP LPC1768 chip.
+# http://mbed.org/handbook/mbed-NXP-LPC1768
+#
+
+source [find interface/cmsis-dap.cfg]
+
+source [find target/lpc1768.cfg]
diff --git a/tcl/interface/cmsis-dap.cfg b/tcl/interface/cmsis-dap.cfg
new file mode 100644
index 00000000..a8ea92ec
--- /dev/null
+++ b/tcl/interface/cmsis-dap.cfg
@@ -0,0 +1,7 @@
+#
+# ARM CMSIS-DAP compliant adapter
+#
+# http://www.keil.com/support/man/docs/dapdebug/
+#
+
+interface cmsis-dap
diff --git a/tcl/target/kl25.cfg b/tcl/target/kl25.cfg
new file mode 100644
index 00000000..c5dda151
--- /dev/null
+++ b/tcl/target/kl25.cfg
@@ -0,0 +1,48 @@
+#
+# Freescale Kinetis KL25 devices
+#
+
+#
+# KL25 devices support both JTAG and SWD transports.
+#
+source [find target/swj-dp.tcl]
+
+if { [info exists CHIPNAME] } {
+ set _CHIPNAME $CHIPNAME
+} else {
+ set _CHIPNAME kl25
+}
+
+if { [info exists ENDIAN] } {
+ set _ENDIAN $ENDIAN
+} else {
+ set _ENDIAN little
+}
+
+# Work-area is a space in RAM used for flash programming
+# By default use 4kB
+if { [info exists WORKAREASIZE] } {
+ set _WORKAREASIZE $WORKAREASIZE
+} else {
+ set _WORKAREASIZE 0x1000
+}
+
+if { [info exists CPUTAPID] } {
+ set _CPUTAPID $CPUTAPID
+} else {
+ set _CPUTAPID 0x0bc11477
+}
+
+swj_newdap $_CHIPNAME cpu -irlen 4 -expected-id $_CPUTAPID
+
+set _TARGETNAME $_CHIPNAME.cpu
+target create $_TARGETNAME cortex_m -endian $_ENDIAN -chain-position $_CHIPNAME.cpu
+
+$_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size $_WORKAREASIZE -work-area-backup 0
+
+set _FLASHNAME $_CHIPNAME.flash
+flash bank $_FLASHNAME kinetis 0 0 0 0 $_TARGETNAME
+
+# if srst is not fitted use SYSRESETREQ to
+# perform a soft reset
+cortex_m reset_config sysresetreq
diff --git a/tcl/target/lpc11uxx.cfg b/tcl/target/lpc11uxx.cfg
new file mode 100644
index 00000000..6968fcd8
--- /dev/null
+++ b/tcl/target/lpc11uxx.cfg
@@ -0,0 +1,48 @@
+#
+# NXP lpc11uxx family
+
+source [find target/swj-dp.tcl]
+
+if { [info exists CHIPNAME] } {
+ set _CHIPNAME $CHIPNAME
+} else {
+ set _CHIPNAME lpc11uxx
+}
+
+if { [info exists ENDIAN] } {
+ set _ENDIAN $ENDIAN
+} else {
+ set _ENDIAN little
+}
+
+# Work-area is a space in RAM used for flash programming
+# By default use 6kB
+if { [info exists WORKAREASIZE] } {
+ set _WORKAREASIZE $WORKAREASIZE
+} else {
+ set _WORKAREASIZE 0x1800
+}
+
+if { [info exists CPUTAPID] } {
+ set _CPUTAPID $CPUTAPID
+} else {
+ set _CPUTAPID 0x00000000
+}
+
+# delays on reset lines
+adapter_nsrst_delay 100
+#jtag_ntrst_delay 100
+
+swj_newdap $_CHIPNAME cpu -irlen 4 -expected-id $_CPUTAPID
+
+set _TARGETNAME $_CHIPNAME.cpu
+target create $_TARGETNAME cortex_m -endian $_ENDIAN -chain-position $_TARGETNAME
+
+$_TARGETNAME configure -work-area-phys 0x10000000 -work-area-size $_WORKAREASIZE -work-area-backup 0
+
+#set _FLASHNAME $_CHIPNAME.flash
+#flash bank $_FLASHNAME lpc2000 0 0 0 0 $_TARGETNAME
+
+# if srst is not fitted use SYSRESETREQ to
+# perform a soft reset
+cortex_m reset_config sysresetreq
diff --git a/tcl/target/lpc17xx.cfg b/tcl/target/lpc17xx.cfg
index 01a8cd37..c81971f9 100644
--- a/tcl/target/lpc17xx.cfg
+++ b/tcl/target/lpc17xx.cfg
@@ -49,10 +49,6 @@ if { [info exists CPUROMSIZE] } {
error "_CPUROMSIZE not set. Please do not include lpc17xx.cfg directly, but the specific chip configuration file (lpc1751.cfg, lpc1764.cfg, etc)."
}
-#delays on reset lines
-adapter_nsrst_delay 200
-jtag_ntrst_delay 200
-
#jtag newtap $_CHIPNAME cpu -irlen 4 -expected-id $_CPUTAPID
swj_newdap $_CHIPNAME cpu -irlen 4 -expected-id $_CPUTAPID
@@ -74,6 +70,12 @@ flash bank $_FLASHNAME lpc2000 0x0 $_CPUROMSIZE 0 0 $_TARGETNAME \
# we have no idea what clock the target is running at.
adapter_khz 10
+# delays on reset lines
+adapter_nsrst_delay 200
+if {$using_jtag} {
+ jtag_ntrst_delay 200
+}
+
$_TARGETNAME configure -event reset-init {
# Do not remap 0x0000-0x0020 to anything but the flash (i.e. select
# "User Flash Mode" where interrupt vectors are _not_ remapped,
diff --git a/tcl/target/swj-dp.tcl b/tcl/target/swj-dp.tcl
index 377b7b5f..fa44583a 100644
--- a/tcl/target/swj-dp.tcl
+++ b/tcl/target/swj-dp.tcl
@@ -18,8 +18,13 @@
# split out "chip" and "tag" so we can someday handle
# them more uniformly irlen too...)
+global using_jtag
+set using_jtag 1
+
proc swj_newdap {chip tag args} {
-set tran [transport select]
-if [string equal $tran "jtag"] { eval jtag newtap $chip $tag $args}
-if [string equal $tran "swd"] { eval swd newdap $chip $tag $args }
+ global using_jtag
+ set tran [transport select]
+ if [string equal $tran "jtag"] { eval jtag newtap $chip $tag $args; set using_jtag 1 }
+ if [string equal $tran "swd"] { eval swd newdap $chip $tag $args; set using_jtag 0 }
+ if [string equal $tran "cmsis-dap"] { eval cmsis-dap newdap $chip $tag $args; set using_jtag 0 }
}