diff options
| author | Felipe Balbi <balbi@ti.com> | 2014-02-28 18:22:38 -0600 |
|---|---|---|
| committer | Paul Fertser <fercerpav@gmail.com> | 2014-03-29 07:00:22 +0000 |
| commit | 058163e32e2c388bef6eab8ef15b93be9a06d67d (patch) | |
| tree | d3bb97e2bc4abfa427efad623b1753046c9e247b /tcl | |
| parent | 58256d48358ab695e970b5e61546aecb366ad914 (diff) | |
cfg: add TI am43xx devices
This adds support for the am43xx SoC and the AM437x GP EVM and AM438x
ePOS EVM.
Change-Id: I09cbb09072f38e0e08fdd520dedb6e67d45056be
Signed-off-by: Felipe Balbi <balbi@ti.com>
Signed-off-by: Tom Rini <trini@ti.com>
Reviewed-on: http://openocd.zylin.com/2047
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
Diffstat (limited to 'tcl')
| -rw-r--r-- | tcl/board/ti_am43xx_evm.cfg | 10 | ||||
| -rw-r--r-- | tcl/target/am437x.cfg | 51 |
2 files changed, 61 insertions, 0 deletions
diff --git a/tcl/board/ti_am43xx_evm.cfg b/tcl/board/ti_am43xx_evm.cfg new file mode 100644 index 00000000..ff7ff645 --- /dev/null +++ b/tcl/board/ti_am43xx_evm.cfg @@ -0,0 +1,10 @@ +# Works on both AM437x GP EVM and AM438x ePOS EVM + +# The JTAG interface is built directly on the board. +source [find interface/ftdi/xds100v2.cfg] + +adapter_khz 16000 + +source [find target/am437x.cfg] + +reset_config trst_and_srst diff --git a/tcl/target/am437x.cfg b/tcl/target/am437x.cfg new file mode 100644 index 00000000..e9a66061 --- /dev/null +++ b/tcl/target/am437x.cfg @@ -0,0 +1,51 @@ +source [find target/icepick.cfg] + +if { [info exists CHIPNAME] } { + set _CHIPNAME $CHIPNAME +} else { + set _CHIPNAME am437x +} + +# +# M3 DAP +# +if { [info exists M3_DAP_TAPID] } { + set _M3_DAP_TAPID $M3_DAP_TAPID +} else { + set _M3_DAP_TAPID 0x4b6b902f +} +jtag newtap $_CHIPNAME m3_dap -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_M3_DAP_TAPID -disable +jtag configure $_CHIPNAME.m3_dap -event tap-enable "icepick_d_tapenable $_CHIPNAME.jrc 11" + +# +# Cortex A9 DAP +# +if { [info exists DAP_TAPID] } { + set _DAP_TAPID $DAP_TAPID +} else { + set _DAP_TAPID 0x4b6b902f +} +jtag newtap $_CHIPNAME dap -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_DAP_TAPID -disable +jtag configure $_CHIPNAME.dap -event tap-enable "icepick_d_tapenable $_CHIPNAME.jrc 12" + +# +# ICEpick-D (JTAG route controller) +# +if { [info exists JRC_TAPID] } { + set _JRC_TAPID $JRC_TAPID +} else { + set _JRC_TAPID 0x0b98c02f +} +jtag newtap $_CHIPNAME jrc -irlen 6 -ircapture 0x1 -irmask 0x3f -expected-id $_JRC_TAPID -ignore-version +jtag configure $_CHIPNAME.jrc -event setup "jtag tapenable $_CHIPNAME.dap" +# some TCK tycles are required to activate the DEBUG power domain +jtag configure $_CHIPNAME.jrc -event post-reset "runtest 100" + +# +# Cortex A9 target +# +set _TARGETNAME $_CHIPNAME.cpu +target create $_TARGETNAME cortex_a -chain-position $_CHIPNAME.dap + +# SRAM: 64K at 0x4030.0000; use the first 16K +$_TARGETNAME configure -work-area-phys 0x40300000 -work-area-size 0x4000 |