diff options
author | Andreas Färber <afaerber@suse.de> | 2015-04-23 12:30:39 +0200 |
---|---|---|
committer | Spencer Oliver <spen@spen-soft.co.uk> | 2015-09-30 22:10:36 +0100 |
commit | 8e5eaac5291b69a73d7cd943b26bc5235d34ef13 (patch) | |
tree | bbd78e62a7b6bb64276325678595c0c024eccb86 /tcl | |
parent | 874f0157eb01f8486b8e739244b4429a92a8182e (diff) |
tcl/interface/ftdi: Add Digilent JTAG-HS3 config
Derived from tcl/interface/digilent-hs1.cfg.
JTAG-HS3 has an open drain buffer on pin 14 for SRST to work with
PS_SRST_B on Xilinx Zynq SoC.
Change-Id: I1e9e72d0511528a61207e318aff937ae9fad5bf9
Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-on: http://openocd.zylin.com/2728
Tested-by: jenkins
Reviewed-by: Robert Jordens <jordens@gmail.com>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Diffstat (limited to 'tcl')
-rw-r--r-- | tcl/interface/ftdi/digilent_jtag_hs3.cfg | 13 |
1 files changed, 13 insertions, 0 deletions
diff --git a/tcl/interface/ftdi/digilent_jtag_hs3.cfg b/tcl/interface/ftdi/digilent_jtag_hs3.cfg new file mode 100644 index 00000000..f7b8e570 --- /dev/null +++ b/tcl/interface/ftdi/digilent_jtag_hs3.cfg @@ -0,0 +1,13 @@ +# +# Digilent JTAG-HS3 +# + +interface ftdi +ftdi_vid_pid 0x0403 0x6014 +ftdi_device_desc "Digilent USB Device" + +# From Digilent support: +# The SRST pin is [...] 0x20 and 0x10 is the /OE (active low output enable) + +ftdi_layout_init 0x2088 0x308b +ftdi_layout_signal nSRST -data 0x2000 -noe 0x1000 |