numicro: Integrate Nuvoton NuMicro flash driver.

Flash driver "mini51.c" and "nuc1x.c" are same target MCU.
This patch integrates each driver and functions,
and makes into new "NuMicro" flash driver.

Change-Id: Ifff5c1cfdd265acca0f489631695be9194fa144c
Signed-off-by: Nemui Trinomius <nemuisan_kawausogasuki@live.jp>
Reviewed-on: http://openocd.zylin.com/2794
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>

2 files changed, 60 insertions, 61 deletions

diff --git a/tcl/target/m051.cfg b/tcl/target/m051.cfg
deleted file mode 100644
index d0655947..00000000
--- a/tcl/target/m051.cfg
+++ /dev/null
@@ -1,61 +0,0 @@
-# script for nuvoton M051 family
-
-transport select hla_swd
-
-source [find target/swj-dp.tcl]
-
-if { [info exists CHIPNAME] } {
-   set _CHIPNAME $CHIPNAME
-} else {
-   set _CHIPNAME m051
-}
-
-if { [info exists ENDIAN] } {
-   set _ENDIAN $ENDIAN
-} else {
-   set _ENDIAN little
-}
-
-# Work-area is a space in RAM used for flash programming
-# By default use 4kB
-if { [info exists WORKAREASIZE] } {
-   set _WORKAREASIZE $WORKAREASIZE
-} else {
-   set _WORKAREASIZE 0x1000
-}
-
-if { [info exists CPUTAPID] } {
-   set _CPUTAPID $CPUTAPID
-} else {
-  # See STM Document RM0091
-  # Section 29.5.3
-   set _CPUTAPID 0x0bb11477
-}
-
-swj_newdap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
-
-set _TARGETNAME $_CHIPNAME.cpu
-target create $_TARGETNAME cortex_m -endian $_ENDIAN -chain-position $_TARGETNAME
-
-$_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size $_WORKAREASIZE -work-area-backup 0
-
-# flash size will be probed
-set _FLASHNAME $_CHIPNAME.flash_aprom
-flash bank $_FLASHNAME mini51 0x00000000 0x4000 0 0 $_TARGETNAME
-set _FLASHNAME $_CHIPNAME.flash_data
-flash bank $_FLASHNAME mini51 0x0001F000 0x1000 0 0 $_TARGETNAME
-set _FLASHNAME $_CHIPNAME.flash_ldrom
-flash bank $_FLASHNAME mini51 0x00100000 0x1000 0 0 $_TARGETNAME
-set _FLASHNAME $_CHIPNAME.flash_conf
-flash bank $_FLASHNAME mini51 0x00300000 0x0100 0 0 $_TARGETNAME
-
-# adapter speed should be <= F_CPU/6. F_CPU after reset is 8MHz, so use F_JTAG = 1MHz
-adapter_khz 1000
-
-adapter_nsrst_delay 100
-
-if {![using_hla]} {
-   # if srst is not fitted use SYSRESETREQ to
-   # perform a soft reset
-   cortex_m reset_config sysresetreq
-}
diff --git a/tcl/target/numicro.cfg b/tcl/target/numicro.cfg
new file mode 100644
index 00000000..13d96543
--- /dev/null
+++ b/tcl/target/numicro.cfg
@@ -0,0 +1,60 @@
+# script for Nuvoton MuMicro Cortex-M0 Series
+
+# Adapt based on what transport is active.
+source [find target/swj-dp.tcl]
+
+# Set Chipname
+if { [info exists CHIPNAME] } {
+	set _CHIPNAME $CHIPNAME
+} else {
+	set _CHIPNAME NuMicro
+}
+
+# SWD DP-ID Nuvoton NuMicro Cortex-M0 has SWD Transport only.
+if { [info exists CPUDAPID] } {
+	set _CPUDAPID $CPUDAPID
+} else {
+	set _CPUDAPID 0x0BB11477
+}
+
+# Work-area is a space in RAM used for flash programming
+# By default use 2kB
+if { [info exists WORKAREASIZE] } {
+   set _WORKAREASIZE $WORKAREASIZE
+} else {
+   set _WORKAREASIZE 0x800
+}
+
+
+# Debug Adapter Target Settings
+swj_newdap $_CHIPNAME cpu -irlen 4 -expected-id $_CPUDAPID
+set _TARGETNAME $_CHIPNAME.cpu
+target create $_TARGETNAME cortex_m -chain-position $_TARGETNAME
+
+$_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size $_WORKAREASIZE -work-area-backup 0
+
+# flash bank <name> numicro <base> <size(autodetect,set to 0)> 0 0 <target#>
+#set _FLASHNAME $_CHIPNAME.flash
+#flash bank $_FLASHNAME numicro 0 $_FLASHSIZE 0 0 $_TARGETNAME
+# flash size will be probed
+set _FLASHNAME $_CHIPNAME.flash_aprom
+flash bank $_FLASHNAME numicro 0x00000000 0 0 0 $_TARGETNAME
+set _FLASHNAME $_CHIPNAME.flash_data
+flash bank $_FLASHNAME numicro 0x0001F000 0 0 0 $_TARGETNAME
+set _FLASHNAME $_CHIPNAME.flash_ldrom
+flash bank $_FLASHNAME numicro 0x00100000 0 0 0 $_TARGETNAME
+set _FLASHNAME $_CHIPNAME.flash_config
+flash bank $_FLASHNAME numicro 0x00300000 0 0 0 $_TARGETNAME
+
+# set default SWCLK frequency
+adapter_khz 1000
+
+# set default srst setting "none"
+reset_config none
+
+# HLA doesn't have cortex_m commands
+if {![using_hla]} {
+   # if srst is not fitted use SYSRESETREQ to
+   # perform a soft reset
+   cortex_m reset_config sysresetreq
+}