diff options
| author | Paul Fertser <fercerpav@gmail.com> | 2015-01-15 23:48:42 +0300 |
|---|---|---|
| committer | Paul Fertser <fercerpav@gmail.com> | 2015-01-30 09:40:55 +0000 |
| commit | 5b6c29a4574be095544df9d7a37f9738304156f8 (patch) | |
| tree | 20bdc18b1980cea2c33e681721589f95e2a3c960 /tcl/target | |
| parent | 4f441486e59e6e8ca5759c3fef33eb5920cb199f (diff) | |
tcl/target: add lpc8xx.cfg
This adds a trivial config for LPC8xx chips based on the already
existing infrastructure in lpc1xxx.cfg.
Change-Id: I7384df1f3c2e3e8ab767319728db5c4f8149480f
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/2464
Tested-by: jenkins
Reviewed-by: Andreas Färber <afaerber@suse.de>
Reviewed-by: Nemui Trinomius <nemuisan_kawausogasuki@live.jp>
Diffstat (limited to 'tcl/target')
| -rw-r--r-- | tcl/target/lpc1xxx.cfg | 18 | ||||
| -rw-r--r-- | tcl/target/lpc8xx.cfg | 8 |
2 files changed, 18 insertions, 8 deletions
diff --git a/tcl/target/lpc1xxx.cfg b/tcl/target/lpc1xxx.cfg index 60b50521..2a2db94e 100644 --- a/tcl/target/lpc1xxx.cfg +++ b/tcl/target/lpc1xxx.cfg @@ -8,6 +8,7 @@ # # !!!!!! +# LPC8xx chips support only SWD transport. # LPC11xx chips support only SWD transport. # LPC12xx chips support only SWD transport. # LPC11Uxx chips support both JTAG and SWD transports. @@ -24,7 +25,7 @@ if { [info exists CHIPNAME] } { if { [info exists CHIPSERIES] } { # Validate chip series is supported - if { $CHIPSERIES != "lpc1100" && $CHIPSERIES != "lpc1200" && $CHIPSERIES != "lpc1300" && $CHIPSERIES != "lpc1700" } { + if { $CHIPSERIES != "lpc800" && $CHIPSERIES != "lpc1100" && $CHIPSERIES != "lpc1200" && $CHIPSERIES != "lpc1300" && $CHIPSERIES != "lpc1700" } { error "Unsupported LPC1xxx chip series specified." } set _CHIPSERIES $CHIPSERIES @@ -42,8 +43,8 @@ if { [info exists CCLK] } { # Allow user override set _CCLK $CCLK } else { - # LPC11xx/LPC12xx/LPC13xx use a 12MHz one, LPC17xx uses a 4MHz one - if { $_CHIPSERIES == "lpc1100" || $_CHIPSERIES == "lpc1200" || $_CHIPSERIES == "lpc1300" } { + # LPC8xx/LPC11xx/LPC12xx/LPC13xx use a 12MHz one, LPC17xx uses a 4MHz one + if { $_CHIPSERIES == "lpc800" || $_CHIPSERIES == "lpc1100" || $_CHIPSERIES == "lpc1200" || $_CHIPSERIES == "lpc1300" } { set _CCLK 12000 } elseif { $_CHIPSERIES == "lpc1700" } { set _CCLK 4000 @@ -54,8 +55,8 @@ if { [info exists CPUTAPID] } { # Allow user override set _CPUTAPID $CPUTAPID } else { - # LPC11xx/LPC12xx uses a Cortex M0 core, LPC13xx/LPC17xx use a Cortex M3 core - if { $_CHIPSERIES == "lpc1100" || $_CHIPSERIES == "lpc1200" } { + # LPC8xx/LPC11xx/LPC12xx use a Cortex M0/M0+ core, LPC13xx/LPC17xx use a Cortex M3 core + if { $_CHIPSERIES == "lpc800" || $_CHIPSERIES == "lpc1100" || $_CHIPSERIES == "lpc1200" } { set _CPUTAPID 0x0bb11477 } elseif { $_CHIPSERIES == "lpc1300" || $_CHIPSERIES == "lpc1700" } { if { [using_jtag] } { @@ -99,7 +100,7 @@ set _FLASHNAME $_CHIPNAME.flash flash bank $_FLASHNAME lpc2000 0x0 0 0 0 $_TARGETNAME \ auto $_CCLK calc_checksum -if { $_CHIPSERIES == "lpc1100" || $_CHIPSERIES == "lpc1200" || $_CHIPSERIES == "lpc1300" } { +if { $_CHIPSERIES == "lpc800" || $_CHIPSERIES == "lpc1100" || $_CHIPSERIES == "lpc1200" || $_CHIPSERIES == "lpc1300" } { # Do not remap 0x0000-0x0200 to anything but the flash (i.e. select # "User Flash Mode" where interrupt vectors are _not_ remapped, # and reside in flash instead). @@ -144,8 +145,9 @@ if {[using_jtag]} { jtag_ntrst_delay 200 } -# LPC11xx/LPC12xx (Cortex M0 core) supports SYSRESETREQ -# LPC13xx/LPC17xx (Cortex M3 core) supports SYSRESETREQ +# LPC8xx (Cortex M0+ core) support SYSRESETREQ +# LPC11xx/LPC12xx (Cortex M0 core) support SYSRESETREQ +# LPC13xx/LPC17xx (Cortex M3 core) support SYSRESETREQ if {![using_hla]} { # if srst is not fitted use SYSRESETREQ to # perform a soft reset diff --git a/tcl/target/lpc8xx.cfg b/tcl/target/lpc8xx.cfg new file mode 100644 index 00000000..56541504 --- /dev/null +++ b/tcl/target/lpc8xx.cfg @@ -0,0 +1,8 @@ +# NXP LPC8xx Cortex-M0+ with at least 1kB SRAM +set CHIPNAME lpc8xx +set CHIPSERIES lpc800 +if { ![info exists WORKAREASIZE] } { + set WORKAREASIZE 0x400 +} + +source [find target/lpc1xxx.cfg] |