diff options
| author | Uwe Hermann <uwe@hermann-uwe.de> | 2011-10-29 23:32:17 +0200 |
|---|---|---|
| committer | Spencer Oliver <spen@spen-soft.co.uk> | 2011-11-07 16:16:33 +0000 |
| commit | ca45e700b1c57caca2ef08e665e3c7e3e02ac8d3 (patch) | |
| tree | b3a745550c44fbac2101d25ae89be31e5e10631c /tcl/target/stellaris.cfg | |
| parent | 17b546a900f2215d26cfdafa6938d814c0ab4ec3 (diff) | |
target config files: Fix whitespace issues.
Drop useless double-space occurences, drop trailing whitespace, and fix
some other minor whitespace-related issues.
Change-Id: I6b4c515492e2ee94dc25ef1fe4f51015a4bba8b5
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/137
Tested-by: jenkins
Diffstat (limited to 'tcl/target/stellaris.cfg')
| -rw-r--r-- | tcl/target/stellaris.cfg | 14 |
1 files changed, 7 insertions, 7 deletions
diff --git a/tcl/target/stellaris.cfg b/tcl/target/stellaris.cfg index 3ab5c0b9..a272e66f 100644 --- a/tcl/target/stellaris.cfg +++ b/tcl/target/stellaris.cfg @@ -6,7 +6,7 @@ global _DEVICECLASS -if { [info exists DEVICECLASS ] } { +if { [info exists DEVICECLASS] } { set _DEVICECLASS $DEVICECLASS } else { set _DEVICECLASS 0xff @@ -20,9 +20,9 @@ source [find target/swj-dp.tcl] # are usable only for ISP style initial flash programming. if { [info exists CHIPNAME] } { - set _CHIPNAME $CHIPNAME + set _CHIPNAME $CHIPNAME } else { - set _CHIPNAME lm3s + set _CHIPNAME lm3s } # CPU TAP ID 0x1ba00477 for early Sandstorm parts @@ -31,7 +31,7 @@ if { [info exists CHIPNAME] } { # CPU TAP ID 0x4ba00477 for Cortex-M3 r2p0 (on Tempest) # ... we'll ignore the JTAG version field, rather than list every # chip revision that turns up. -if { [info exists CPUTAPID ] } { +if { [info exists CPUTAPID] } { set _CPUTAPID $CPUTAPID } else { set _CPUTAPID 0x0ba00477 @@ -43,7 +43,7 @@ if { [info exists CPUTAPID ] } { swj_newdap $_CHIPNAME cpu -irlen 4 -irmask 0xf \ -expected-id $_CPUTAPID -ignore-version -if { [info exists WORKAREASIZE ] } { +if { [info exists WORKAREASIZE] } { set _WORKAREASIZE $WORKAREASIZE } else { # default to 8K working area @@ -55,7 +55,7 @@ target create $_TARGETNAME cortex_m3 -chain-position $_CHIPNAME.cpu # 8K working area at base of ram, not backed up # -# NOTE: you may need or want to reconfigure the work area; +# NOTE: you may need or want to reconfigure the work area; # some parts have just 6K, and you may want to use other # addresses (at end of mem not beginning) or back it up. $_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size $_WORKAREASIZE @@ -63,7 +63,7 @@ $_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size $_WORKAREASIZE # JTAG speed ... slow enough to work with a 12 MHz RC oscillator; # LM3S parts don't support RTCK # -# NOTE: this may be increased by a reset-init handler, after it +# NOTE: this may be increased by a reset-init handler, after it # configures and enables the PLL. Or you might need to decrease # this, if you're using a slower clock. adapter_khz 500 |