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authorPaul Fertser <fercerpav@gmail.com>2013-09-28 14:23:15 +0400
committerAndreas Fritiofson <andreas.fritiofson@gmail.com>2014-08-11 21:25:56 +0000
commitc7384117c66e8f18896ca09ab8095d6da16bb1e5 (patch)
tree2513a1c61d2d8c6d92171a238281189ca3962f4a /tcl/target/lpc4350.cfg
parentf701c0cbeb346df4cda378d3b4d5136aabba3b37 (diff)
Allow transports to override the selected target (hla configs unification)
This should allow to share common configs for both regular access and high-level adapters. Use the newly-added functionality in stlink and icdi drivers, amend the configs accordingly. Runtime-tested with a TI tm4c123g board. Change-Id: Ibb88266a4ca25f06f6c073e916c963f017447bad Signed-off-by: Paul Fertser <fercerpav@gmail.com> [gus@projectgus.com: context-specific deprecation warnings] Signed-off-by: Angus Gratton <gus@projectgus.com> [andrew.smirnov@gmail.com: additional nrf51.cfg mods] Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Tested-by: Andrey Skvortsov <andrej.skvortzov@gmail.com> Reviewed-on: http://openocd.zylin.com/1664 Tested-by: jenkins Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Diffstat (limited to 'tcl/target/lpc4350.cfg')
-rw-r--r--tcl/target/lpc4350.cfg34
1 files changed, 22 insertions, 12 deletions
diff --git a/tcl/target/lpc4350.cfg b/tcl/target/lpc4350.cfg
index 47f25296..fae54f77 100644
--- a/tcl/target/lpc4350.cfg
+++ b/tcl/target/lpc4350.cfg
@@ -1,3 +1,4 @@
+source [find target/swj-dp.tcl]
adapter_khz 500
@@ -25,6 +26,12 @@ if { [info exists M4_SWD_TAPID] } {
set _M4_SWD_TAPID 0x2ba01477
}
+if { [using_jtag] } {
+ set _M4_TAPID $_M4_JTAG_TAPID
+} {
+ set _M4_TAPID $_M4_SWD_TAPID
+}
+
#
# M0 TAP
#
@@ -34,18 +41,21 @@ if { [info exists M0_JTAG_TAPID] } {
set _M0_JTAG_TAPID 0x0ba01477
}
-jtag newtap $_CHIPNAME m4 -irlen 4 -ircapture 0x1 -irmask 0xf \
- -expected-id $_M4_JTAG_TAPID
+swj_newdap $_CHIPNAME m4 -irlen 4 -ircapture 0x1 -irmask 0xf \
+ -expected-id $_M4_TAPID
+target create $_CHIPNAME.m4 cortex_m -chain-position $_CHIPNAME.m4
-jtag newtap $_CHIPNAME m0 -irlen 4 -ircapture 0x1 -irmask 0xf \
+if { [using_jtag] } {
+ swj_newdap $_CHIPNAME m0 -irlen 4 -ircapture 0x1 -irmask 0xf \
-expected-id $_M0_JTAG_TAPID
+ target create $_CHIPNAME.m0 cortex_m -chain-position $_CHIPNAME.m0
+}
-target create $_CHIPNAME.m4 cortex_m -chain-position $_CHIPNAME.m4
-target create $_CHIPNAME.m0 cortex_m -chain-position $_CHIPNAME.m0
-
-# on this CPU we should use VECTRESET to perform a soft reset and
-# manually reset the periphery
-# SRST or SYSRESETREQ disable the debug interface for the time of
-# the reset and will not fit our requirements for a consistent debug
-# session
-cortex_m reset_config vectreset
+if {![using_hla]} {
+ # on this CPU we should use VECTRESET to perform a soft reset and
+ # manually reset the periphery
+ # SRST or SYSRESETREQ disable the debug interface for the time of
+ # the reset and will not fit our requirements for a consistent debug
+ # session
+ cortex_m reset_config vectreset
+}