diff options
author | zwelch <zwelch@b42882b7-edfa-0310-969c-e2dbd0fdcd60> | 2009-05-27 06:49:24 +0000 |
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committer | zwelch <zwelch@b42882b7-edfa-0310-969c-e2dbd0fdcd60> | 2009-05-27 06:49:24 +0000 |
commit | dbbc9c41f7db210b0a4e226540a28e0a8a5019bf (patch) | |
tree | ce358672ddde8b15a02db12c718eb53689c490f6 /tcl/target/lpc2148.cfg | |
parent | 140d6c8e7948710a764965075bfaa700efd09802 (diff) |
Move TCL script files -- Step 2 of 2:
- Move src/tcl to tcl/.
- Update top Makefile.am to use new path name.
git-svn-id: svn://svn.berlios.de/openocd/trunk@1919 b42882b7-edfa-0310-969c-e2dbd0fdcd60
Diffstat (limited to 'tcl/target/lpc2148.cfg')
-rw-r--r-- | tcl/target/lpc2148.cfg | 56 |
1 files changed, 56 insertions, 0 deletions
diff --git a/tcl/target/lpc2148.cfg b/tcl/target/lpc2148.cfg new file mode 100644 index 00000000..d367a8f5 --- /dev/null +++ b/tcl/target/lpc2148.cfg @@ -0,0 +1,56 @@ +# Use RCLK. If RCLK is not available fall back to 500kHz. +# +# Depending on cabling you might be able to eek this up to 2000kHz. +jtag_rclk 500 + +if { [info exists CHIPNAME] } { + set _CHIPNAME $CHIPNAME +} else { + set _CHIPNAME lpc2148 +} + +if { [info exists ENDIAN] } { + set _ENDIAN $ENDIAN +} else { + set _ENDIAN little +} + +if { [info exists CPUTAPID ] } { + set _CPUTAPID $CPUTAPID +} else { + set _CPUTAPID 0x4f1f0f0f +} + +jtag_nsrst_delay 200 +jtag_ntrst_delay 200 + +# NOTE!!! LPCs need reset pulled while RTCK is low. 0 to activate +# JTAG, power-on reset is not enough, i.e. you need to perform a +# reset before being able to talk to the LPC2148, attach is not possible. + +reset_config trst_and_srst srst_pulls_trst + +jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID + +set _TARGETNAME [format "%s.cpu" $_CHIPNAME] + +target create $_TARGETNAME arm7tdmi -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm7tdmi-s_r4 + +$_TARGETNAME configure -work-area-virt 0 -work-area-phys 0x40000000 -work-area-size 0x4000 -work-area-backup 0 + +$_TARGETNAME configure -event reset-init { + # Force target into ARM state. + soft_reset_halt + + # Do not remap 0x0000-0x0020 to anything but the flash (i.e. select + # "User Flash Mode" where interrupt vectors are _not_ remapped, + # and reside in flash instead). + # + # See section 7.1 on page 32 ("Memory Mapping control register") in + # "UM10139: Volume 1: LPC214x User Manual", Rev. 02 -- 25 July 2006. + # http://www.standardics.nxp.com/support/documents/microcontrollers/pdf/user.manual.lpc2141.lpc2142.lpc2144.lpc2146.lpc2148.pdf + mwb 0xE01FC040 0x01 +} + +# flash bank lpc2000 <base> <size> 0 0 <target#> <variant> <clock> [calc_checksum] +flash bank lpc2000 0x0 0x7d000 0 0 0 lpc2000_v2 14765 calc_checksum |