diff options
| author | Vanya Sergeev <vsergeev@gmail.com> | 2014-02-20 01:06:04 -0800 |
|---|---|---|
| committer | Andreas Fritiofson <andreas.fritiofson@gmail.com> | 2014-09-08 23:05:08 +0000 |
| commit | b5a6ba46aaed530a4b1397b9617de0ff316f6efb (patch) | |
| tree | daa73548b7d14361198899fdf8c2dd16d1583997 /tcl/target/lpc1752.cfg | |
| parent | 1e439e2a9a4392586bdfce0ebab4d63690f7fe6e (diff) | |
cfg: refactor lpc1xxx targets onto one base config
Since now auto-detection for flash size works nicely, there's no
reason to keep numerous configs around.
Change-Id: If0cbc37985abf17ef7c1f7d0688e76500fac228f
Signed-off-by: Vanya Sergeev <vsergeev@gmail.com>
Reviewed-on: http://openocd.zylin.com/1960
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Diffstat (limited to 'tcl/target/lpc1752.cfg')
| -rw-r--r-- | tcl/target/lpc1752.cfg | 21 |
1 files changed, 0 insertions, 21 deletions
diff --git a/tcl/target/lpc1752.cfg b/tcl/target/lpc1752.cfg deleted file mode 100644 index 3aae38f1..00000000 --- a/tcl/target/lpc1752.cfg +++ /dev/null @@ -1,21 +0,0 @@ -# !!!!!!!!!!!! -# ! UNTESTED ! -# !!!!!!!!!!!! - -# NXP LPC1752 Cortex-M3 with 64kB Flash and 16kB Local On-Chip SRAM, -set CHIPNAME lpc1752 -set CPUTAPID 0x4ba00477 -set CPURAMSIZE 0x4000 -set CPUROMSIZE 0x10000 - -# After reset the chip is clocked by the ~4MHz internal RC oscillator. -# When board-specific code (reset-init handler or device firmware) -# configures another oscillator and/or PLL0, set CCLK to match; if -# you don't, then flash erase and write operations may misbehave. -# (The ROM code doing those updates cares about core clock speed...) -# -# CCLK is the core clock frequency in KHz -set CCLK 4000 - -#Include the main configuration file. -source [find target/lpc17xx.cfg]; |