diff options
| author | Spencer Oliver <spen@spen-soft.co.uk> | 2013-12-19 21:33:19 +0000 |
|---|---|---|
| committer | Spencer Oliver <spen@spen-soft.co.uk> | 2014-01-09 15:20:51 +0000 |
| commit | 4dc8cd201c667bac72bc083ef1fa1b285eb093fc (patch) | |
| tree | deefe8349199480a80a8defcbf42d7b4f9c5f18a /tcl/target/lpc11uxx.cfg | |
| parent | 4bff54ccf455fbdfd2bdf9aa371c79f267d486d9 (diff) | |
cmsis-dap: add initial cmsis-dap support
This is based on work from:
https://github.com/TheShed/OpenOCD-CMSIS-DAP/tree/cmsis-dap
Main changes include moving over to using HIDAPI rather than libusb-1.0
and cleaning up to merge into master. Support for reset using srst has
also been added.
It has been tested on all the mbed boards as well as the Freedom board
from Freescale. These boards only implement SWD mode, however JTAG mode
has been tested with a Keil ULINK2 and a stm32 target - but requires a lot
more work.
Change-Id: I96d5ee1993bc9c0526219ab754c5aad3b55d812d
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Signed-off-by: Andrey Yurovsky <yurovsky@gmail.com>
Reviewed-on: http://openocd.zylin.com/1542
Tested-by: jenkins
Diffstat (limited to 'tcl/target/lpc11uxx.cfg')
| -rw-r--r-- | tcl/target/lpc11uxx.cfg | 48 |
1 files changed, 48 insertions, 0 deletions
diff --git a/tcl/target/lpc11uxx.cfg b/tcl/target/lpc11uxx.cfg new file mode 100644 index 00000000..6968fcd8 --- /dev/null +++ b/tcl/target/lpc11uxx.cfg @@ -0,0 +1,48 @@ +# +# NXP lpc11uxx family + +source [find target/swj-dp.tcl] + +if { [info exists CHIPNAME] } { + set _CHIPNAME $CHIPNAME +} else { + set _CHIPNAME lpc11uxx +} + +if { [info exists ENDIAN] } { + set _ENDIAN $ENDIAN +} else { + set _ENDIAN little +} + +# Work-area is a space in RAM used for flash programming +# By default use 6kB +if { [info exists WORKAREASIZE] } { + set _WORKAREASIZE $WORKAREASIZE +} else { + set _WORKAREASIZE 0x1800 +} + +if { [info exists CPUTAPID] } { + set _CPUTAPID $CPUTAPID +} else { + set _CPUTAPID 0x00000000 +} + +# delays on reset lines +adapter_nsrst_delay 100 +#jtag_ntrst_delay 100 + +swj_newdap $_CHIPNAME cpu -irlen 4 -expected-id $_CPUTAPID + +set _TARGETNAME $_CHIPNAME.cpu +target create $_TARGETNAME cortex_m -endian $_ENDIAN -chain-position $_TARGETNAME + +$_TARGETNAME configure -work-area-phys 0x10000000 -work-area-size $_WORKAREASIZE -work-area-backup 0 + +#set _FLASHNAME $_CHIPNAME.flash +#flash bank $_FLASHNAME lpc2000 0 0 0 0 $_TARGETNAME + +# if srst is not fitted use SYSRESETREQ to +# perform a soft reset +cortex_m reset_config sysresetreq |