diff options
author | zwelch <zwelch@b42882b7-edfa-0310-969c-e2dbd0fdcd60> | 2009-05-27 06:49:24 +0000 |
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committer | zwelch <zwelch@b42882b7-edfa-0310-969c-e2dbd0fdcd60> | 2009-05-27 06:49:24 +0000 |
commit | dbbc9c41f7db210b0a4e226540a28e0a8a5019bf (patch) | |
tree | ce358672ddde8b15a02db12c718eb53689c490f6 /tcl/target/imx31.cfg | |
parent | 140d6c8e7948710a764965075bfaa700efd09802 (diff) |
Move TCL script files -- Step 2 of 2:
- Move src/tcl to tcl/.
- Update top Makefile.am to use new path name.
git-svn-id: svn://svn.berlios.de/openocd/trunk@1919 b42882b7-edfa-0310-969c-e2dbd0fdcd60
Diffstat (limited to 'tcl/target/imx31.cfg')
-rw-r--r-- | tcl/target/imx31.cfg | 62 |
1 files changed, 62 insertions, 0 deletions
diff --git a/tcl/target/imx31.cfg b/tcl/target/imx31.cfg new file mode 100644 index 00000000..3fed2f82 --- /dev/null +++ b/tcl/target/imx31.cfg @@ -0,0 +1,62 @@ +# imx31 config +# + +reset_config trst_and_srst + +if { [info exists CHIPNAME] } { + set _CHIPNAME $CHIPNAME +} else { + set _CHIPNAME imx31 +} + +if { [info exists ENDIAN] } { + set _ENDIAN $ENDIAN +} else { + set _ENDIAN little +} + +if { [info exists CPUTAPID ] } { + set _CPUTAPID $CPUTAPID +} else { + set _CPUTAPID 0x07b3601d +} + +if { [info exists SDMATAPID ] } { + set _SDMATAPID $SDMATAPID +} else { + set _SDMATAPID 0x2190101d +} + +#======================================== +# The "system jtag controller" +# IMX31 reference manual, page 6-28 - figure 6-14 +if { [info exists SJCTAPID ] } { + set _SJCTAPID $SJCTAPID +} else { + set _SJCTAPID 0x2b900f0f +} +jtag newtap $_CHIPNAME sjc -irlen 4 -ircapture 0x0 -irmask 0x0 -expected-id $_SJCTAPID + +# The "SDMA" - <S>mart <DMA> controller debug tap +# Based on some IO pins - this can be disabled & removed +# See diagram: 6-14 +# SIGNAL NAME: +# SJC_MOD - controls multiplexer - disables ARM1136 +# SDMA_BYPASS - disables SDMA - +# +# Per ARM: DDI0211J_arm1136_r1p5_trm.pdf - the ARM 1136 as a 5 bit IR register +jtag newtap $_CHIPNAME cpu -irlen 5 -ircapture 0x1 -irmask 0x1f -expected-id $_CPUTAPID + +# No IDCODE for this TAP +jtag newtap $_CHIPNAME whatchacallit -irlen 4 -ircapture 0 -irmask 0xf -expected-id 0x0 + +# Per section 40.17.1, table 40-85 the IR register is 4 bits +# But this conflicts with Diagram 6-13, "3bits ir and drs" +jtag newtap $_CHIPNAME smda -irlen 5 -ircapture 0x1 -irmask 0x1f -expected-id $_SDMATAPID + +set _TARGETNAME [format "%s.cpu" $_CHIPNAME] +target create $_TARGETNAME arm11 -endian $_ENDIAN -chain-position $_TARGETNAME + + +proc power_restore {} { puts "Sensed power restore. No action." } +proc srst_deasserted {} { puts "Sensed nSRST deasserted. No action." } |