diff options
author | Paul Fertser <fercerpav@gmail.com> | 2013-10-13 19:15:24 +0400 |
---|---|---|
committer | Spencer Oliver <spen@spen-soft.co.uk> | 2013-10-29 22:49:35 +0000 |
commit | d4e195ad1b544b0396cab4c70437371958769196 (patch) | |
tree | 610413e0cdd6d95d282b950e571913eeec5a7c4e /tcl/target/at91sam9g20.cfg | |
parent | 2b10052097c882cf0ed92748c15ff6ee001c1f8f (diff) |
Remove jtag_rclk from target configs
Some boards might have RCLK omitted from the JTAG connector and if the
interface claims support for it, OpenOCD will end up trying to use
RCLK while it's actually impossible.
This is a "cd tcl/target; sed -i s/jtag_rclk/adapter_khz/g *" patch.
Change-Id: Iee7337107bc1457966b104389ba9db75a9c860b4
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/1695
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-by: Mathias Küster <kesmtp@freenet.de>
Diffstat (limited to 'tcl/target/at91sam9g20.cfg')
-rw-r--r-- | tcl/target/at91sam9g20.cfg | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/tcl/target/at91sam9g20.cfg b/tcl/target/at91sam9g20.cfg index 8a2e69b9..3f5e3c62 100644 --- a/tcl/target/at91sam9g20.cfg +++ b/tcl/target/at91sam9g20.cfg @@ -12,7 +12,7 @@ source [find target/at91sam9.cfg] # Set fallback clock to 1/6 of worst-case clock speed (which would be the 32.768 kHz slow clock). -jtag_rclk 5 +adapter_khz 5 # Establish internal SRAM memory work areas that are important to pre-bootstrap loaders, etc. The # AT91SAM9G20 has two SRAM areas, one starting at 0x00200000 and the other starting at 0x00300000. |