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authorRobert Jordens <jordens@gmail.com>2015-07-01 03:18:46 -0600
committerSpencer Oliver <spen@spen-soft.co.uk>2015-08-06 13:14:08 +0100
commitd25355473da9a925a696183a9947aac292cd2f60 (patch)
treefa695378980ccf9cf0b326a2df4c7dc53709b471 /tcl/cpld/xilinx-xc6s.cfg
parent3edcb941864d677e30d36ad77c22d86ec7ac8eb3 (diff)
flash/nor/jtagspi: add JTAGSPI driver
Many FPGA board speak JTAG and have a SPI flash for their bitstream attached to them. The SPI flash is programmed by first uploading a proxy bitstream to the FPGA that connects the JTAG interface to the SPI interface if the IR contains a certain USER instruction. Then the SPI flash can be erase, written, read directly through the JTAG DR. The JTAG and SPI signaling is compatible. Such a proxy bitstream only needs to connect TDO-MISO, TDI-MOSI, TCK-CLK, and the activate the chip select when the IR contains the special instruction and the JTAG state machine is in the DR-SHIFT state. Change-Id: Ibc21d793a83b36fa37e2704966aa5c837c4dd0d2 Signed-off-by: Robert Jordens <jordens@gmail.com> Reviewed-on: http://openocd.zylin.com/2844 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Diffstat (limited to 'tcl/cpld/xilinx-xc6s.cfg')
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