diff options
| author | Karl Palsson <karlp@tweak.net.au> | 2014-11-21 22:14:57 +0000 |
|---|---|---|
| committer | Andreas Fritiofson <andreas.fritiofson@gmail.com> | 2014-12-03 09:10:21 +0000 |
| commit | c3ec1940b52e5d3f47c5c96bea2430b4444d83ea (patch) | |
| tree | aa08235d4625bca1f87bd199e9d38d354e463e99 /tcl/board/stm32l0discovery.cfg | |
| parent | 12b41a3409ad310c2e2c42f59bff836a1d498b12 (diff) | |
stm32l: split l0/l1 support no jtag, different HSI settings
L0 is cortex m0+, so different id codes, SWD only, different addresses
for the clock speedup. It has no endian options, no boundary scan.
Removed all L0 specific portions from L1 files, and renamed files to clarify
their purpose. The deprecated stm32lx_stlink.cfg is kept as is, as it is only
around for backwards compatibility with prior releases.
Tested on STM32L053 Discovery and STM32L151 Discovery.
Has _not_ been tested with jtag on L1.
Change-Id: I8eea890d2f92a302d9e9c8a8832d218ee1b6bcfc
Signed-off-by: Karl Palsson <karlp@tweak.net.au>
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/2405
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-by: Juha Niskanen <juha.niskanen@haltian.com>
Diffstat (limited to 'tcl/board/stm32l0discovery.cfg')
| -rw-r--r-- | tcl/board/stm32l0discovery.cfg | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/tcl/board/stm32l0discovery.cfg b/tcl/board/stm32l0discovery.cfg index e1be9a88..57b8a600 100644 --- a/tcl/board/stm32l0discovery.cfg +++ b/tcl/board/stm32l0discovery.cfg @@ -6,7 +6,7 @@ source [find interface/stlink-v2-1.cfg] transport select hla_swd set WORKAREASIZE 0x2000 -source [find target/stm32l.cfg] +source [find target/stm32l0.cfg] # use hardware reset, connect under reset reset_config srst_only srst_nogate |