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authorAntonio Borneo <borneo.antonio@gmail.com>2011-12-02 19:23:54 +0800
committerSpencer Oliver <spen@spen-soft.co.uk>2011-12-06 21:06:15 +0000
commitb7ce3b5d15723306e2f2aec3eb68eb575633f6a6 (patch)
treefc19381d431e391c36cfb06bb36088c4511da274 /tcl/board/spear320cpu.cfg
parent122509a0dc2e33b0526bdb6d16511489fa87ffe0 (diff)
TCL/SPEAr: default one DDR chip
Handle default case of single DDR chip Propagate global variable for multi DDR chip Change-Id: I315380f91ee7fcc2976437aa5836d88a7964fc9d Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: http://openocd.zylin.com/251 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Diffstat (limited to 'tcl/board/spear320cpu.cfg')
-rw-r--r--tcl/board/spear320cpu.cfg9
1 files changed, 8 insertions, 1 deletions
diff --git a/tcl/board/spear320cpu.cfg b/tcl/board/spear320cpu.cfg
index 71efca76..e21db341 100644
--- a/tcl/board/spear320cpu.cfg
+++ b/tcl/board/spear320cpu.cfg
@@ -34,11 +34,18 @@ if { [info exists BOARD_HAS_SRST] } {
$_TARGETNAME configure -event reset-init { spear320cpu_init }
+if { [info exists DDR_CHIPS] } {
+ set _DDR_CHIPS $DDR_CHIPS
+} else {
+ set _DDR_CHIPS 1
+}
+
proc spear320cpu_init {} {
+ global _DDR_CHIPS
reg pc 0xffff0020; # loop forever
sp3xx_clock_default
sp3xx_common_init
- sp3xx_ddr_init "mt47h64m16_3_333_cl5_async" $DDR_CHIPS
+ sp3xx_ddr_init "mt47h64m16_3_333_cl5_async" $_DDR_CHIPS
sp320_init
}