diff options
author | Antonio Borneo <borneo.antonio@gmail.com> | 2011-11-18 13:09:14 +0800 |
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committer | Spencer Oliver <spen@spen-soft.co.uk> | 2011-11-21 22:09:09 +0000 |
commit | c8f4d82b45647d6db3af122bcd7aabe4670c61b0 (patch) | |
tree | b264bc1ea153e8867db083b644274aa858aa6428 /tcl/board/spear300evb.cfg | |
parent | 56e64812b837fc6c66a7e4c8033ec4329a0234e5 (diff) |
TCL: Add board file for EVALSPEAr300
Initial support for SPEAr300 chip and for evaluation
board named EVALSPEAr300.
Currently supports only those parts in common with
SPEAr310.
Change-Id: I8075aa721cf3dfaac561ee51e5df4ce9a2992e3e
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/230
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Diffstat (limited to 'tcl/board/spear300evb.cfg')
-rw-r--r-- | tcl/board/spear300evb.cfg | 44 |
1 files changed, 44 insertions, 0 deletions
diff --git a/tcl/board/spear300evb.cfg b/tcl/board/spear300evb.cfg new file mode 100644 index 00000000..9f957038 --- /dev/null +++ b/tcl/board/spear300evb.cfg @@ -0,0 +1,44 @@ +# Configuration for the ST SPEAr300 Evaluation board +# EVALSPEAr300 Rev. 1.0 +# http://www.st.com/spear +# +# Date: 2010-11-27 +# Author: Antonio Borneo <borneo.antonio@gmail.com> + +# The standard board has JTAG SRST not connected. +# This script targets such boards using quirky code to bypass the issue. + + +source [find mem_helper.tcl] +source [find target/spear3xx.cfg] +source [find chip/st/spear/spear3xx_ddr.tcl] +source [find chip/st/spear/spear3xx.tcl] + +arm7_9 dcc_downloads enable +arm7_9 fast_memory_access enable + + +# Serial NOR on SMI CS0. 8Mbyte. +set _FLASHNAME1 $_CHIPNAME.snor +flash bank $_FLASHNAME1 stmsmi 0xf8000000 0 0 0 $_TARGETNAME + +if { [info exists BOARD_HAS_SRST] } { + # Modified board has SRST on JTAG connector + reset_config trst_and_srst separate srst_gates_jtag \ + trst_push_pull srst_open_drain +} else { + # Standard board has no SRST on JTAG connector + reset_config trst_only separate srst_gates_jtag trst_push_pull + source [find chip/st/spear/quirk_no_srst.tcl] +} + +$_TARGETNAME configure -event reset-init { spear300evb_init } + +proc spear300evb_init {} { + reg pc 0xffff0020; # loop forever + + sp3xx_clock_default + sp3xx_common_init + sp3xx_ddr_init "mt47h64m16_3_333_cl5_async" + sp300_init +} |