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author | Matthias Welwarsky <matthias@welwarsky.de> | 2015-10-18 14:00:52 +0200 |
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committer | Paul Fertser <fercerpav@gmail.com> | 2015-11-30 05:42:35 +0000 |
commit | 9484dd5ebfcc7f9426f8ffc37f5486cd0387bb6a (patch) | |
tree | bc93e1ce6e1af723045860f67cb4c004bfbde194 /tcl/board/quark_x10xx_board.cfg | |
parent | f3716894c6c2ab0e16bdb073d79e4df855897c10 (diff) |
armv7a: correctly handle invalidation of inner data caches
D-Cache invalidate is a dangerous operation. It will only work correctly
if full cache lines are invalidated. When partial cache lines are
invalidated, i.e. the target address range does not start and end
at a cache line boundary, cpu data writes outside of the target range
will be dropped. This patch adds special treatment for partial cache
lines by doing a clean & invalidate on the partial lines before
invalidating the rest of the range.
Change-Id: I64099ddb058638e990a7eb0ee911b9cc8f6f8901
Signed-off-by: Matthias Welwarsky <matthias@welwarsky.de>
Reviewed-on: http://openocd.zylin.com/3034
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
Diffstat (limited to 'tcl/board/quark_x10xx_board.cfg')
0 files changed, 0 insertions, 0 deletions