ULINK driver and OpenULINK firmware: whitespace and comment fixes (trivial)

In commit de0130a0aad83c1ef692ee4d68ab996a8668424d, some doxygen documentation
blocks of the form "///< ..." (documentation after member) got changed to
"/* /< ...", which is not recognized by doxygen. This commit changes them to
the correct form "/**< ...".

Also, remove some leading whitespace characters and fix alignment of comment
blocks where appropriate.

Change-Id: I73a5cf55753722fa0e1d6551f05c47ee88172f0f
Signed-off-by: Martin Schmölzer <martin.schmoelzer@student.tuwien.ac.at>
Reviewed-on: http://openocd.zylin.com/1483
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>

4 files changed, 400 insertions, 400 deletions

diff --git a/src/jtag/drivers/OpenULINK/include/reg_ezusb.h b/src/jtag/drivers/OpenULINK/include/reg_ezusb.h
index 0a59c403..82f9451e 100644
--- a/src/jtag/drivers/OpenULINK/include/reg_ezusb.h
+++ b/src/jtag/drivers/OpenULINK/include/reg_ezusb.h
@@ -65,7 +65,7 @@ SFR(DPL1,           0x84);
 SFR(DPL2,           0x85);
 
 SFR(DPS,            0x86);
-  #define SEL       bmBit0
+#define SEL         bmBit0
 /* Bit 1 read-only, always reads '0' */
 /* Bit 2 read-only, always reads '0' */
 /* Bit 3 read-only, always reads '0' */
@@ -75,36 +75,36 @@ SFR(DPS,            0x86);
 /* Bit 7 read-only, always reads '0' */
 
 SFR(PCON,           0x87);
-  #define IDLE      bmBit0
-  #define STOP      bmBit1
-  #define GF0       bmBit2
-  #define GF1       bmBit3
+#define IDLE        bmBit0
+#define STOP        bmBit1
+#define GF0         bmBit2
+#define GF1         bmBit3
 /* Bit 4 read-only, always reads '1' */
 /* Bit 5 read-only, always reads '1' */
 /* Bit 6 unused */
-  #define SMOD0     bmBit7
+#define SMOD0     bmBit7
 
 SFR(TCON,           0x88);
-SBIT(IT0,         0x88, 0);
-SBIT(IE0,         0x88, 1);
-SBIT(IT1,         0x88, 2);
-SBIT(IE1,         0x88, 3);
-SBIT(TR0,         0x88, 4);
-SBIT(TF0,         0x88, 5);
-SBIT(TR1,         0x88, 6);
-SBIT(TF1,         0x88, 7);
+SBIT(IT0,           0x88, 0);
+SBIT(IE0,           0x88, 1);
+SBIT(IT1,           0x88, 2);
+SBIT(IE1,           0x88, 3);
+SBIT(TR0,           0x88, 4);
+SBIT(TF0,           0x88, 5);
+SBIT(TR1,           0x88, 6);
+SBIT(TF1,           0x88, 7);
 
 SFR(TMOD,           0x89);
 /* Some bits in this register share the same name in the EZ-USB TRM. Therefore,
  * we add a '0'/'1' to distinguish them */
-  #define M00       bmBit0
-  #define M01       bmBit1
-  #define CT0       bmBit2
-  #define GATE0     bmBit3
-  #define M10       bmBit4
-  #define M11       bmBit5
-  #define CT1       bmBit6
-  #define GATE1     bmBit7
+#define M00         bmBit0
+#define M01         bmBit1
+#define CT0         bmBit2
+#define GATE0       bmBit3
+#define M10         bmBit4
+#define M11         bmBit5
+#define CT1         bmBit6
+#define GATE1       bmBit7
 
 SFR(TL0,            0x8A);
 SFR(TL1,            0x8B);
@@ -112,17 +112,17 @@ SFR(TH0,            0x8C);
 SFR(TH1,            0x8D);
 
 SFR(CKCON,          0x8E);
-  #define MD0       bmBit0
-  #define MD1       bmBit1
-  #define MD2       bmBit2
-  #define T0M       bmBit3
-  #define T1M       bmBit4
-  #define T2M       bmBit5
+#define MD0         bmBit0
+#define MD1         bmBit1
+#define MD2         bmBit2
+#define T0M         bmBit3
+#define T1M         bmBit4
+#define T2M         bmBit5
 /* Bit 6 unused */
 /* Bit 7 unused */
 
 SFR(SPC_FNC,        0x8D);
-  #define bmWRS     bmBit0
+#define bmWRS       bmBit0
 /* Bit 1 read-only, always reads '0' */
 /* Bit 2 read-only, always reads '0' */
 /* Bit 3 read-only, always reads '0' */
@@ -136,10 +136,10 @@ SFR(EXIF,           0x91);
 /* Bit 1 read-only, always reads '0' */
 /* Bit 2 read-only, always reads '0' */
 /* Bit 3 read-only, always reads '1' */
-  #define USBINT    bmBit4
-  #define I2CINT    bmBit5
-  #define IE4       bmBit6
-  #define IE5       bmBit7
+#define USBINT      bmBit4
+#define I2CINT      bmBit5
+#define IE4         bmBit6
+#define IE5         bmBit7
 
 /* Definition of the _XPAGE register, according to SDCC Compiler User Guide,
  * Version 3.0.1, Chapter 4, p. 61. Also see EZ-USB TRM, p. 2-4. */
@@ -147,58 +147,58 @@ SFR(MPAGE,          0x92);
 SFR(_XPAGE,         0x92);
 
 SFR(SCON0,          0x98);
-SBIT(RI_0,        0x98, 0);
-SBIT(TI_0,        0x98, 1);
-SBIT(RB8_0,       0x98, 2);
-SBIT(TB8_0,       0x98, 3);
-SBIT(REN_0,       0x98, 4);
-SBIT(SM2_0,       0x98, 5);
-SBIT(SM1_0,       0x98, 6);
-SBIT(SM0_0,       0x98, 7);
+SBIT(RI_0,          0x98, 0);
+SBIT(TI_0,          0x98, 1);
+SBIT(RB8_0,         0x98, 2);
+SBIT(TB8_0,         0x98, 3);
+SBIT(REN_0,         0x98, 4);
+SBIT(SM2_0,         0x98, 5);
+SBIT(SM1_0,         0x98, 6);
+SBIT(SM0_0,         0x98, 7);
 
 SFR(SBUF0,          0x99);
 
 SFR(IE,             0xA8);
-SBIT(EX0,         0xA8, 0);
-SBIT(ET0,         0xA8, 1);
-SBIT(EX1,         0xA8, 2);
-SBIT(ET1,         0xA8, 3);
-SBIT(ES0,         0xA8, 4);
-SBIT(ET2,         0xA8, 5);
-SBIT(ES1,         0xA8, 6);
-SBIT(EA,          0xA8, 7);
+SBIT(EX0,           0xA8, 0);
+SBIT(ET0,           0xA8, 1);
+SBIT(EX1,           0xA8, 2);
+SBIT(ET1,           0xA8, 3);
+SBIT(ES0,           0xA8, 4);
+SBIT(ET2,           0xA8, 5);
+SBIT(ES1,           0xA8, 6);
+SBIT(EA,            0xA8, 7);
 
 SFR(IP,             0xB8);
-SBIT(PX0,         0xB8, 0);
-SBIT(PT0,         0xB8, 1);
-SBIT(PX1,         0xB8, 2);
-SBIT(PT1,         0xB8, 3);
-SBIT(PS0,         0xB8, 4);
-SBIT(PT2,         0xB8, 5);
-SBIT(PS1,         0xB8, 6);
+SBIT(PX0,           0xB8, 0);
+SBIT(PT0,           0xB8, 1);
+SBIT(PX1,           0xB8, 2);
+SBIT(PT1,           0xB8, 3);
+SBIT(PS0,           0xB8, 4);
+SBIT(PT2,           0xB8, 5);
+SBIT(PS1,           0xB8, 6);
 /* Bit 7 read-only, always reads '1' */
 
 SFR(SCON1,          0xC0);
-SBIT(RI_1,        0xC0, 0);
-SBIT(TI_1,        0xC0, 1);
-SBIT(RB8_1,       0xC0, 2);
-SBIT(TB8_1,       0xC0, 3);
-SBIT(REN_1,       0xC0, 4);
-SBIT(SM2_1,       0xC0, 5);
-SBIT(SM1_1,       0xC0, 6);
-SBIT(SM0_1,       0xC0, 7);
+SBIT(RI_1,          0xC0, 0);
+SBIT(TI_1,          0xC0, 1);
+SBIT(RB8_1,         0xC0, 2);
+SBIT(TB8_1,         0xC0, 3);
+SBIT(REN_1,         0xC0, 4);
+SBIT(SM2_1,         0xC0, 5);
+SBIT(SM1_1,         0xC0, 6);
+SBIT(SM0_1,         0xC0, 7);
 
 SFR(SBUF1,          0xC1);
 
 SFR(T2CON,          0xC8);
-SBIT(CPRL2,       0xC8, 0);
-SBIT(CT2,         0xC8, 1);
-SBIT(TR2,         0xC8, 2);
-SBIT(EXEN2,       0xC8, 3);
-SBIT(TCLK,        0xC8, 4);
-SBIT(RCLK,        0xC8, 5);
-SBIT(EXF2,        0xC8, 6);
-SBIT(TF2,         0xC8, 7);
+SBIT(CPRL2,         0xC8, 0);
+SBIT(CT2,           0xC8, 1);
+SBIT(TR2,           0xC8, 2);
+SBIT(EXEN2,         0xC8, 3);
+SBIT(TCLK,          0xC8, 4);
+SBIT(RCLK,          0xC8, 5);
+SBIT(EXF2,          0xC8, 6);
+SBIT(TF2,           0xC8, 7);
 
 SFR(RCAP2L,         0xCA);
 SFR(RCAP2H,         0xCB);
@@ -206,33 +206,33 @@ SFR(TL2,            0xCC);
 SFR(TH2,            0xCD);
 
 SFR(PSW,            0xD0);
-SBIT(P,           0xD0, 0);
-SBIT(F1,          0xD0, 1);
-SBIT(OV,          0xD0, 2);
-SBIT(RS0,         0xD0, 3);
-SBIT(RS1,         0xD0, 4);
-SBIT(F0,          0xD0, 5);
-SBIT(AC,          0xD0, 6);
-SBIT(CY,          0xD0, 7);
+SBIT(P,             0xD0, 0);
+SBIT(F1,            0xD0, 1);
+SBIT(OV,            0xD0, 2);
+SBIT(RS0,           0xD0, 3);
+SBIT(RS1,           0xD0, 4);
+SBIT(F0,            0xD0, 5);
+SBIT(AC,            0xD0, 6);
+SBIT(CY,            0xD0, 7);
 
 SFR(EICON,          0xD8);
 /* Bit 0 read-only, always reads '0' */
 /* Bit 1 read-only, always reads '0' */
 /* Bit 2 read-only, always reads '0' */
-SBIT(INT6,        0xD8, 3);
-SBIT(RESI,        0xD8, 4);
-SBIT(ERESI,       0xD8, 5);
+SBIT(INT6,          0xD8, 3);
+SBIT(RESI,          0xD8, 4);
+SBIT(ERESI,         0xD8, 5);
 /* Bit 6 read-only, always reads '1' */
-SBIT(SMOD1,       0xD8, 7);
+SBIT(SMOD1,         0xD8, 7);
 
 SFR(ACC,            0xE0);
 
 SFR(EIE,            0xE8);
-SBIT(EUSB,        0xE8, 0);
-SBIT(EI2C,        0xE8, 1);
-SBIT(EX4,         0xE8, 2);
-SBIT(EX5,         0xE8, 3);
-SBIT(EWDI,        0xE8, 4);
+SBIT(EUSB,          0xE8, 0);
+SBIT(EI2C,          0xE8, 1);
+SBIT(EX4,           0xE8, 2);
+SBIT(EX5,           0xE8, 3);
+SBIT(EWDI,          0xE8, 4);
 /* Bit 5 read-only, always reads '1' */
 /* Bit 6 read-only, always reads '1' */
 /* Bit 7 read-only, always reads '1' */
@@ -240,11 +240,11 @@ SBIT(EWDI,        0xE8, 4);
 SFR(B,              0xF0);
 
 SFR(EIP,            0xF8);
-SBIT(PUSB,        0xF8, 0);
-SBIT(PI2C,        0xF8, 1);
-SBIT(PX4,         0xF8, 2);
-SBIT(PX5,         0xF8, 3);
-SBIT(PX6,         0xF8, 4);
+SBIT(PUSB,          0xF8, 0);
+SBIT(PI2C,          0xF8, 1);
+SBIT(PX4,           0xF8, 2);
+SBIT(PX5,           0xF8, 3);
+SBIT(PX6,           0xF8, 4);
 /* Bit 5 read-only, always reads '1' */
 /* Bit 6 read-only, always reads '1' */
 /* Bit 7 read-only, always reads '1' */
@@ -311,179 +311,179 @@ SFRX(OUT16BCL,      0x7F7F);
 
 /****************************** CPU Registers ******************************/
 SFRX(CPUCS,         0x7F92);
-  #define RES8051   bmBit0
-  #define CLK24OE   bmBit1
+#define RES8051     bmBit0
+#define CLK24OE     bmBit1
 /* Bit 2 read-only, always reads '0' */
 /* Bit 3 read-only, always reads '0' */
 /* Bits 4...7: Chip Revision */
 
 SFRX(PORTACFG,      0x7F93);
-  #define T0OUT     bmBit0
-  #define T1OUT     bmBit1
-  #define OE        bmBit2
-  #define CS        bmBit3
-  #define FWR       bmBit4
-  #define FRD       bmBit5
-  #define RXD0OUT   bmBit6
-  #define RXD1OUT   bmBit7
+#define T0OUT       bmBit0
+#define T1OUT       bmBit1
+#define OE          bmBit2
+#define CS          bmBit3
+#define FWR         bmBit4
+#define FRD         bmBit5
+#define RXD0OUT     bmBit6
+#define RXD1OUT     bmBit7
 
 SFRX(PORTBCFG,      0x7F94);
-  #define T2        bmBit0
-  #define T2EX      bmBit1
-  #define RXD1      bmBit2
-  #define TXD1      bmBit3
-  #define INT4      bmBit4
-  #define INT5      bmBit5
-  #define INT6      bmBit6
-  #define T2OUT     bmBit7
+#define T2          bmBit0
+#define T2EX        bmBit1
+#define RXD1        bmBit2
+#define TXD1        bmBit3
+#define INT4        bmBit4
+#define INT5        bmBit5
+#define INT6        bmBit6
+#define T2OUT       bmBit7
 
 SFRX(PORTCCFG,      0x7F95);
-  #define RXD0      bmBit0
-  #define TXD0      bmBit1
-  #define INT0      bmBit2
-  #define INT1      bmBit3
-  #define T0        bmBit4
-  #define T1        bmBit5
-  #define WR        bmBit6
-  #define RD        bmBit7
+#define RXD0        bmBit0
+#define TXD0        bmBit1
+#define INT0        bmBit2
+#define INT1        bmBit3
+#define T0          bmBit4
+#define T1          bmBit5
+#define WR          bmBit6
+#define RD          bmBit7
 
 /*********************** Input-Output Port Registers ***********************/
 SFRX(OUTA,          0x7F96);
-  #define OUTA0     bmBit0
-  #define OUTA1     bmBit1
-  #define OUTA2     bmBit2
-  #define OUTA3     bmBit3
-  #define OUTA4     bmBit4
-  #define OUTA5     bmBit5
-  #define OUTA6     bmBit6
-  #define OUTA7     bmBit7
+#define OUTA0       bmBit0
+#define OUTA1       bmBit1
+#define OUTA2       bmBit2
+#define OUTA3       bmBit3
+#define OUTA4       bmBit4
+#define OUTA5       bmBit5
+#define OUTA6       bmBit6
+#define OUTA7       bmBit7
 
 SFRX(OUTB,          0x7F97);
-  #define OUTB0     bmBit0
-  #define OUTB1     bmBit1
-  #define OUTB2     bmBit2
-  #define OUTB3     bmBit3
-  #define OUTB4     bmBit4
-  #define OUTB5     bmBit5
-  #define OUTB6     bmBit6
-  #define OUTB7     bmBit7
+#define OUTB0       bmBit0
+#define OUTB1       bmBit1
+#define OUTB2       bmBit2
+#define OUTB3       bmBit3
+#define OUTB4       bmBit4
+#define OUTB5       bmBit5
+#define OUTB6       bmBit6
+#define OUTB7       bmBit7
 
 SFRX(OUTC,          0x7F98);
-  #define OUTC0     bmBit0
-  #define OUTC1     bmBit1
-  #define OUTC2     bmBit2
-  #define OUTC3     bmBit3
-  #define OUTC4     bmBit4
-  #define OUTC5     bmBit5
-  #define OUTC6     bmBit6
-  #define OUTC7     bmBit7
+#define OUTC0       bmBit0
+#define OUTC1       bmBit1
+#define OUTC2       bmBit2
+#define OUTC3       bmBit3
+#define OUTC4       bmBit4
+#define OUTC5       bmBit5
+#define OUTC6       bmBit6
+#define OUTC7       bmBit7
 
 SFRX(PINSA,         0x7F99);
-  #define PINA0     bmBit0
-  #define PINA1     bmBit1
-  #define PINA2     bmBit2
-  #define PINA3     bmBit3
-  #define PINA4     bmBit4
-  #define PINA5     bmBit5
-  #define PINA6     bmBit6
-  #define PINA7     bmBit7
+#define PINA0       bmBit0
+#define PINA1       bmBit1
+#define PINA2       bmBit2
+#define PINA3       bmBit3
+#define PINA4       bmBit4
+#define PINA5       bmBit5
+#define PINA6       bmBit6
+#define PINA7       bmBit7
 
 SFRX(PINSB,         0x7F9A);
-  #define PINB0     bmBit0
-  #define PINB1     bmBit1
-  #define PINB2     bmBit2
-  #define PINB3     bmBit3
-  #define PINB4     bmBit4
-  #define PINB5     bmBit5
-  #define PINB6     bmBit6
-  #define PINB7     bmBit7
+#define PINB0       bmBit0
+#define PINB1       bmBit1
+#define PINB2       bmBit2
+#define PINB3       bmBit3
+#define PINB4       bmBit4
+#define PINB5       bmBit5
+#define PINB6       bmBit6
+#define PINB7       bmBit7
 
 SFRX(PINSC,         0x7F9B);
-  #define PINC0     bmBit0
-  #define PINC1     bmBit1
-  #define PINC2     bmBit2
-  #define PINC3     bmBit3
-  #define PINC4     bmBit4
-  #define PINC5     bmBit5
-  #define PINC6     bmBit6
-  #define PINC7     bmBit7
+#define PINC0       bmBit0
+#define PINC1       bmBit1
+#define PINC2       bmBit2
+#define PINC3       bmBit3
+#define PINC4       bmBit4
+#define PINC5       bmBit5
+#define PINC6      bmBit6
+#define PINC7       bmBit7
 
 SFRX(OEA,           0x7F9C);
-  #define OEA0      bmBit0
-  #define OEA1      bmBit1
-  #define OEA2      bmBit2
-  #define OEA3      bmBit3
-  #define OEA4      bmBit4
-  #define OEA5      bmBit5
-  #define OEA6      bmBit6
-  #define OEA7      bmBit7
+#define OEA0        bmBit0
+#define OEA1        bmBit1
+#define OEA2        bmBit2
+#define OEA3        bmBit3
+#define OEA4        bmBit4
+#define OEA5        bmBit5
+#define OEA6        bmBit6
+#define OEA7        bmBit7
 
 SFRX(OEB,           0x7F9D);
-  #define OEB0      bmBit0
-  #define OEB1      bmBit1
-  #define OEB2      bmBit2
-  #define OEB3      bmBit3
-  #define OEB4      bmBit4
-  #define OEB5      bmBit5
-  #define OEB6      bmBit6
-  #define OEB7      bmBit7
+#define OEB0        bmBit0
+#define OEB1        bmBit1
+#define OEB2        bmBit2
+#define OEB3        bmBit3
+#define OEB4        bmBit4
+#define OEB5        bmBit5
+#define OEB6        bmBit6
+#define OEB7        bmBit7
 
 SFRX(OEC,           0x7F9E);
-  #define OEC0      bmBit0
-  #define OEC1      bmBit1
-  #define OEC2      bmBit2
-  #define OEC3      bmBit3
-  #define OEC4      bmBit4
-  #define OEC5      bmBit5
-  #define OEC6      bmBit6
-  #define OEC7      bmBit7
+#define OEC0        bmBit0
+#define OEC1        bmBit1
+#define OEC2        bmBit2
+#define OEC3        bmBit3
+#define OEC4        bmBit4
+#define OEC5        bmBit5
+#define OEC6        bmBit6
+#define OEC7        bmBit7
 
 /* 0x7F9F reserved */
 
 /****************** Isochronous Control/Status Registers *******************/
 SFRX(ISOERR,        0x7FA0);
-  #define ISO8ERR   bmBit0
-  #define ISO9ERR   bmBit1
-  #define ISO10ERR  bmBit2
-  #define ISO11ERR  bmBit3
-  #define ISO12ERR  bmBit4
-  #define ISO13ERR  bmBit5
-  #define ISO14ERR  bmBit6
-  #define ISO15ERR  bmBit7
+#define ISO8ERR     bmBit0
+#define ISO9ERR     bmBit1
+#define ISO10ERR    bmBit2
+#define ISO11ERR    bmBit3
+#define ISO12ERR    bmBit4
+#define ISO13ERR    bmBit5
+#define ISO14ERR    bmBit6
+#define ISO15ERR    bmBit7
 
 SFRX(ISOCTL,        0x7FA1);
-  #define ISODISAB  bmBit0
-  #define MBZ0      bmBit1
-  #define MBZ1      bmBit2
-  #define PPSTAT    bmBit3
+#define ISODISAB    bmBit0
+#define MBZ0        bmBit1
+#define MBZ1        bmBit2
+#define PPSTAT      bmBit3
 /* Bit 4 unused */
 /* Bit 5 unused */
 /* Bit 6 unused */
 /* Bit 7 unused */
 
 SFRX(ZBCOUT,        0x7FA2);
-  #define EP8       bmBit0
-  #define EP9       bmBit1
-  #define EP10      bmBit2
-  #define EP11      bmBit3
-  #define EP12      bmBit4
-  #define EP13      bmBit5
-  #define EP14      bmBit6
-  #define EP15      bmBit7
+#define EP8         bmBit0
+#define EP9         bmBit1
+#define EP10        bmBit2
+#define EP11        bmBit3
+#define EP12        bmBit4
+#define EP13        bmBit5
+#define EP14        bmBit6
+#define EP15        bmBit7
 
 /* 0x7FA3 reserved */
 /* 0x7FA4 reserved */
 
 /****************************** I2C Registers ******************************/
 SFRX(I2CS,          0x7FA5);
-  #define DONE      bmBit0
-  #define ACK       bmBit1
-  #define BERR      bmBit2
-  #define ID0       bmBit3
-  #define ID1       bmBit4
-  #define LASTRD    bmBit5
-  #define I2C_STOP  bmBit6
-  #define I2C_START bmBit7
+#define DONE        bmBit0
+#define ACK         bmBit1
+#define BERR        bmBit2
+#define ID0         bmBit3
+#define ID1         bmBit4
+#define LASTRD      bmBit5
+#define I2C_STOP    bmBit6
+#define I2C_START   bmBit7
 
 SFRX(I2DAT,         0x7FA6);
 /* 0x7FA7 reserved */
@@ -492,78 +492,78 @@ SFRX(I2DAT,         0x7FA6);
 SFRX(IVEC,          0x7FA8);
 /* Bit 0 read-only, always reads '0' */
 /* Bit 1 read-only, always reads '0' */
-  #define IV0       bmBit2
-  #define IV1       bmBit3
-  #define IV2       bmBit4
-  #define IV3       bmBit5
-  #define IV4       bmBit6
+#define IV0         bmBit2
+#define IV1         bmBit3
+#define IV2         bmBit4
+#define IV3         bmBit5
+#define IV4         bmBit6
 /* Bit 7 read-only, always reads '0' */
 
 SFRX(IN07IRQ,       0x7FA9);
-  #define IN0IR     bmBit0
-  #define IN1IR     bmBit1
-  #define IN2IR     bmBit2
-  #define IN3IR     bmBit3
-  #define IN4IR     bmBit4
-  #define IN5IR     bmBit5
-  #define IN6IR     bmBit6
-  #define IN7IR     bmBit7
+#define IN0IR       bmBit0
+#define IN1IR       bmBit1
+#define IN2IR       bmBit2
+#define IN3IR       bmBit3
+#define IN4IR       bmBit4
+#define IN5IR       bmBit5
+#define IN6IR       bmBit6
+#define IN7IR       bmBit7
 
 SFRX(OUT07IRQ,      0x7FAA);
-  #define OUT0IR    bmBit0
-  #define OUT1IR    bmBit1
-  #define OUT2IR    bmBit2
-  #define OUT3IR    bmBit3
-  #define OUT4IR    bmBit4
-  #define OUT5IR    bmBit5
-  #define OUT6IR    bmBit6
-  #define OUT7IR    bmBit7
+#define OUT0IR      bmBit0
+#define OUT1IR      bmBit1
+#define OUT2IR      bmBit2
+#define OUT3IR      bmBit3
+#define OUT4IR      bmBit4
+#define OUT5IR      bmBit5
+#define OUT6IR      bmBit6
+#define OUT7IR      bmBit7
 
 SFRX(USBIRQ,        0x7FAB);
-  #define SUDAVIR   bmBit0
-  #define SOFIR     bmBit1
-  #define SUTOKIR   bmBit2
-  #define SUSPIR    bmBit3
-  #define URESIR    bmBit4
+#define SUDAVIR     bmBit0
+#define SOFIR       bmBit1
+#define SUTOKIR     bmBit2
+#define SUSPIR      bmBit3
+#define URESIR      bmBit4
 /* Bit 5 unused */
 /* Bit 6 unused */
 /* Bit 7 unused */
 
 SFRX(IN07IEN,       0x7FAC);
-  #define IN0IEN    bmBit0
-  #define IN1IEN    bmBit1
-  #define IN2IEN    bmBit2
-  #define IN3IEN    bmBit3
-  #define IN4IEN    bmBit4
-  #define IN5IEN    bmBit5
-  #define IN6IEN    bmBit6
-  #define IN7IEN    bmBit7
+#define IN0IEN      bmBit0
+#define IN1IEN      bmBit1
+#define IN2IEN      bmBit2
+#define IN3IEN      bmBit3
+#define IN4IEN      bmBit4
+#define IN5IEN      bmBit5
+#define IN6IEN      bmBit6
+#define IN7IEN      bmBit7
 
 SFRX(OUT07IEN,      0x7FAD);
-  #define OUT0IEN   bmBit0
-  #define OUT1IEN   bmBit1
-  #define OUT2IEN   bmBit2
-  #define OUT3IEN   bmBit3
-  #define OUT4IEN   bmBit4
-  #define OUT5IEN   bmBit5
-  #define OUT6IEN   bmBit6
-  #define OUT7IEN   bmBit7
+#define OUT0IEN     bmBit0
+#define OUT1IEN     bmBit1
+#define OUT2IEN     bmBit2
+#define OUT3IEN     bmBit3
+#define OUT4IEN     bmBit4
+#define OUT5IEN     bmBit5
+#define OUT6IEN     bmBit6
+#define OUT7IEN     bmBit7
 
 SFRX(USBIEN,        0x7FAE);
-  #define SUDAVIE   bmBit0
-  #define SOFIE     bmBit1
-  #define SUTOKIE   bmBit2
-  #define SUSPIE    bmBit3
-  #define URESIE    bmBit4
+#define SUDAVIE     bmBit0
+#define SOFIE       bmBit1
+#define SUTOKIE     bmBit2
+#define SUSPIE      bmBit3
+#define URESIE      bmBit4
 /* Bit 5 unused */
 /* Bit 6 unused */
 /* Bit 7 unused */
 
 SFRX(USBBAV,        0x7FAF);
-  #define AVEN      bmBit0
-  #define BPEN      bmBit1
-  #define BPPULSE   bmBit2
-  #define BREAK     bmBit3
+#define AVEN        bmBit0
+#define BPEN        bmBit1
+#define BPPULSE     bmBit2
+#define BREAK       bmBit3
 /* Bit 4 unused */
 /* Bit 5 unused */
 /* Bit 6 unused */
@@ -576,10 +576,10 @@ SFRX(BPADDRL,       0x7FB3);
 
 /****************************** Endpoints 0-7 ******************************/
 SFRX(EP0CS,         0x7FB4);
-  #define EP0STALL  bmBit0
-  #define HSNAK     bmBit1
-  #define IN0BSY    bmBit2
-  #define OUT0BSY   bmBit3
+#define EP0STALL    bmBit0
+#define HSNAK       bmBit1
+#define IN0BSY      bmBit2
+#define OUT0BSY     bmBit3
 /* Bit 4 unused */
 /* Bit 5 unused */
 /* Bit 6 unused */
@@ -627,24 +627,24 @@ SFRX(SUDPTRH,       0x7FD4);
 SFRX(SUDPTRL,       0x7FD5);
 
 SFRX(USBCS,         0x7FD6);
-  #define SIGRSUME  bmBit0
-  #define RENUM     bmBit1
-  #define DISCOE    bmBit2
-  #define DISCON    bmBit3
+#define SIGRSUME    bmBit0
+#define RENUM       bmBit1
+#define DISCOE      bmBit2
+#define DISCON      bmBit3
 /* Bit 4 unused */
 /* Bit 5 unused */
 /* Bit 6 unused */
-  #define WAKESRC   bmBit7
+#define WAKESRC     bmBit7
 
 SFRX(TOGCTL,        0x7FD7);
-  #define TOG_EP0   bmBit0
-  #define TOG_EP1   bmBit1
-  #define TOG_EP2   bmBit2
+#define TOG_EP0     bmBit0
+#define TOG_EP1     bmBit1
+#define TOG_EP2     bmBit2
 /* Bit 3 is read-only, always reads '0' */
-  #define TOG_IO    bmBit4
-  #define TOG_R     bmBit5
-  #define TOG_S     bmBit6
-  #define TOG_Q     bmBit7
+#define TOG_IO      bmBit4
+#define TOG_R       bmBit5
+#define TOG_S       bmBit6
+#define TOG_Q       bmBit7
 
 SFRX(USBFRAMEL,     0x7FD8);
 SFRX(USBFRAMEH,     0x7FD9);
@@ -653,64 +653,64 @@ SFRX(FNADDR,        0x7FDB);
 /* 0x7FDC reserved */
 
 SFRX(USBPAIR,       0x7FDD);
-  #define PR2IN     bmBit0
-  #define PR4IN     bmBit1
-  #define PR6IN     bmBit2
-  #define PR2OUT    bmBit3
-  #define PR4OUT    bmBit4
-  #define PR6OUT    bmBit5
+#define PR2IN       bmBit0
+#define PR4IN       bmBit1
+#define PR6IN       bmBit2
+#define PR2OUT      bmBit3
+#define PR4OUT      bmBit4
+#define PR6OUT      bmBit5
 /* Bit 6 unused */
-  #define ISOSEND0  bmBit7
+#define ISOSEND0    bmBit7
 
 SFRX(IN07VAL,       0x7FDE);
 /* Bit 0 is read-only, always reads '1' */
-  #define IN1VAL    bmBit1
-  #define IN2VAL    bmBit2
-  #define IN3VAL    bmBit3
-  #define IN4VAL    bmBit4
-  #define IN5VAL    bmBit5
-  #define IN6VAL    bmBit6
-  #define IN7VAL    bmBit7
+#define IN1VAL      bmBit1
+#define IN2VAL      bmBit2
+#define IN3VAL      bmBit3
+#define IN4VAL      bmBit4
+#define IN5VAL      bmBit5
+#define IN6VAL      bmBit6
+#define IN7VAL      bmBit7
 
 SFRX(OUT07VAL,      0x7FDF);
 /* Bit 0 is read-only, always reads '1' */
-  #define OUT1VAL   bmBit1
-  #define OUT2VAL   bmBit2
-  #define OUT3VAL   bmBit3
-  #define OUT4VAL   bmBit4
-  #define OUT5VAL   bmBit5
-  #define OUT6VAL   bmBit6
-  #define OUT7VAL   bmBit7
+#define OUT1VAL     bmBit1
+#define OUT2VAL     bmBit2
+#define OUT3VAL     bmBit3
+#define OUT4VAL     bmBit4
+#define OUT5VAL     bmBit5
+#define OUT6VAL     bmBit6
+#define OUT7VAL     bmBit7
 
 SFRX(INISOVAL,      0x7FE0);
-  #define IN8VAL    bmBit0
-  #define IN9VAL    bmBit1
-  #define IN10VAL   bmBit2
-  #define IN11VAL   bmBit3
-  #define IN12VAL   bmBit4
-  #define IN13VAL   bmBit5
-  #define IN14VAL   bmBit6
-  #define IN15VAL   bmBit7
+#define IN8VAL      bmBit0
+#define IN9VAL      bmBit1
+#define IN10VAL     bmBit2
+#define IN11VAL     bmBit3
+#define IN12VAL     bmBit4
+#define IN13VAL     bmBit5
+#define IN14VAL     bmBit6
+#define IN15VAL     bmBit7
 
 SFRX(OUTISOVAL,     0x7FE1);
-  #define OUT8VAL   bmBit0
-  #define OUT9VAL   bmBit1
-  #define OUT10VAL  bmBit2
-  #define OUT11VAL  bmBit3
-  #define OUT12VAL  bmBit4
-  #define OUT13VAL  bmBit5
-  #define OUT14VAL  bmBit6
-  #define OUT15VAL  bmBit7
+#define OUT8VAL     bmBit0
+#define OUT9VAL     bmBit1
+#define OUT10VAL    bmBit2
+#define OUT11VAL    bmBit3
+#define OUT12VAL    bmBit4
+#define OUT13VAL    bmBit5
+#define OUT14VAL    bmBit6
+#define OUT15VAL    bmBit7
 
 SFRX(FASTXFR,       0x7FE2);
-  #define WMOD0     bmBit0
-  #define WMOD1     bmBit1
-  #define WPOL      bmBit2
-  #define RMOD0     bmBit3
-  #define RMOD1     bmBit4
-  #define RPOL      bmBit5
-  #define FBLK      bmBit6
-  #define FISO      bmBit7
+#define WMOD0       bmBit0
+#define WMOD1       bmBit1
+#define WPOL        bmBit2
+#define RMOD0       bmBit3
+#define RMOD1       bmBit4
+#define RPOL        bmBit5
+#define FBLK        bmBit6
+#define FISO        bmBit7
 
 SFRX(AUTOPTRH,      0x7FE3);
 SFRX(AUTOPTRL,      0x7FE4);
diff --git a/src/jtag/drivers/OpenULINK/include/usb.h b/src/jtag/drivers/OpenULINK/include/usb.h
index 6e6b928f..182b7904 100644
--- a/src/jtag/drivers/OpenULINK/include/usb.h
+++ b/src/jtag/drivers/OpenULINK/include/usb.h
@@ -49,80 +49,80 @@
 
 /** USB Device Descriptor. See USB 1.1 spec, pp. 196 - 198 */
 struct usb_device_descriptor {
-	uint8_t bLength;	/* /< Size of this descriptor in bytes. */
-	uint8_t bDescriptorType;/* /< DEVICE Descriptor Type. */
-	uint16_t bcdUSB;	/* /< USB specification release number (BCD). */
-	uint8_t bDeviceClass;	/* /< Class code. */
-	uint8_t bDeviceSubClass;/* /< Subclass code. */
-	uint8_t bDeviceProtocol;/* /< Protocol code. */
-	uint8_t bMaxPacketSize0;/* /< Maximum packet size for EP0 (8, 16, 32, 64). */
-	uint16_t idVendor;	/* /< USB Vendor ID. */
-	uint16_t idProduct;	/* /< USB Product ID. */
-	uint16_t bcdDevice;	/* /< Device Release Number (BCD). */
-	uint8_t iManufacturer;	/* /< Index of manufacturer string descriptor. */
-	uint8_t iProduct;	/* /< Index of product string descriptor. */
-	uint8_t iSerialNumber;	/* /< Index of string descriptor containing serial #. */
-	uint8_t bNumConfigurations;	/* /< Number of possible configurations. */
+	uint8_t bLength;		/**< Size of this descriptor in bytes. */
+	uint8_t bDescriptorType;	/**< DEVICE Descriptor Type. */
+	uint16_t bcdUSB;		/**< USB specification release number (BCD). */
+	uint8_t bDeviceClass;		/**< Class code. */
+	uint8_t bDeviceSubClass;	/**< Subclass code. */
+	uint8_t bDeviceProtocol;	/**< Protocol code. */
+	uint8_t bMaxPacketSize0;	/**< Maximum packet size for EP0 (8, 16, 32, 64). */
+	uint16_t idVendor;		/**< USB Vendor ID. */
+	uint16_t idProduct;		/**< USB Product ID. */
+	uint16_t bcdDevice;		/**< Device Release Number (BCD). */
+	uint8_t iManufacturer;		/**< Index of manufacturer string descriptor. */
+	uint8_t iProduct;		/**< Index of product string descriptor. */
+	uint8_t iSerialNumber;		/**< Index of string descriptor containing serial #. */
+	uint8_t bNumConfigurations;	/**< Number of possible configurations. */
 };
 
 /** USB Configuration Descriptor. See USB 1.1 spec, pp. 199 - 200 */
 struct usb_config_descriptor {
-	uint8_t bLength;	/* /< Size of this descriptor in bytes. */
-	uint8_t bDescriptorType;/* /< CONFIGURATION descriptor type. */
-	uint16_t wTotalLength;	/* /< Combined total length of all descriptors. */
-	uint8_t bNumInterfaces;	/* /< Number of interfaces in this configuration. */
-	uint8_t bConfigurationValue;	/* /< Value used to select this configuration. */
-	uint8_t iConfiguration;	/* /< Index of configuration string descriptor. */
-	uint8_t bmAttributes;	/* /< Configuration characteristics. */
-	uint8_t MaxPower;	/* /< Maximum power consumption in 2 mA units. */
+	uint8_t bLength;		/**< Size of this descriptor in bytes. */
+	uint8_t bDescriptorType;	/**< CONFIGURATION descriptor type. */
+	uint16_t wTotalLength;		/**< Combined total length of all descriptors. */
+	uint8_t bNumInterfaces;		/**< Number of interfaces in this configuration. */
+	uint8_t bConfigurationValue;	/**< Value used to select this configuration. */
+	uint8_t iConfiguration;		/**< Index of configuration string descriptor. */
+	uint8_t bmAttributes;		/**< Configuration characteristics. */
+	uint8_t MaxPower;		/**< Maximum power consumption in 2 mA units. */
 };
 
 /** USB Interface Descriptor. See USB 1.1 spec, pp. 201 - 203 */
 struct usb_interface_descriptor {
-	uint8_t bLength;	/* /< Size of this descriptor in bytes. */
-	uint8_t bDescriptorType;/* /< INTERFACE descriptor type. */
-	uint8_t bInterfaceNumber;	/* /< Interface number. */
-	uint8_t bAlternateSetting;	/* /< Value used to select alternate setting. */
-	uint8_t bNumEndpoints;	/* /< Number of endpoints used by this interface. */
-	uint8_t bInterfaceClass;/* /< Class code. */
-	uint8_t bInterfaceSubclass;	/* /< Subclass code. */
-	uint8_t bInterfaceProtocol;	/* /< Protocol code. */
-	uint8_t iInterface;	/* /< Index of interface string descriptor. */
+	uint8_t bLength;		/**< Size of this descriptor in bytes. */
+	uint8_t bDescriptorType;	/**< INTERFACE descriptor type. */
+	uint8_t bInterfaceNumber;	/**< Interface number. */
+	uint8_t bAlternateSetting;	/**< Value used to select alternate setting. */
+	uint8_t bNumEndpoints;		/**< Number of endpoints used by this interface. */
+	uint8_t bInterfaceClass;	/**< Class code. */
+	uint8_t bInterfaceSubclass;	/**< Subclass code. */
+	uint8_t bInterfaceProtocol;	/**< Protocol code. */
+	uint8_t iInterface;		/**< Index of interface string descriptor. */
 };
 
 /** USB Endpoint Descriptor. See USB 1.1 spec, pp. 203 - 204 */
 struct usb_endpoint_descriptor {
-	uint8_t bLength;	/* /< Size of this descriptor in bytes. */
-	uint8_t bDescriptorType;/* /< ENDPOINT descriptor type. */
-	uint8_t bEndpointAddress;	/* /< Endpoint Address: USB 1.1 spec, table 9-10. */
-	uint8_t bmAttributes;	/* /< Endpoint Attributes: USB 1.1 spec, table 9-10. */
-	uint16_t wMaxPacketSize;/* /< Maximum packet size for this endpoint. */
-	uint8_t bInterval;	/* /< Polling interval (in ms) for this endpoint. */
+	uint8_t bLength;		/**< Size of this descriptor in bytes. */
+	uint8_t bDescriptorType;	/**< ENDPOINT descriptor type. */
+	uint8_t bEndpointAddress;	/**< Endpoint Address: USB 1.1 spec, table 9-10. */
+	uint8_t bmAttributes;		/**< Endpoint Attributes: USB 1.1 spec, table 9-10. */
+	uint16_t wMaxPacketSize;	/**< Maximum packet size for this endpoint. */
+	uint8_t bInterval;		/**< Polling interval (in ms) for this endpoint. */
 };
 
 /** USB Language Descriptor. See USB 1.1 spec, pp. 204 - 205 */
 struct usb_language_descriptor {
-	uint8_t bLength;	/* /< Size of this descriptor in bytes. */
-	uint8_t bDescriptorType;/* /< STRING descriptor type. */
-	uint16_t wLANGID[];	/* /< LANGID codes. */
+	uint8_t bLength;		/**< Size of this descriptor in bytes. */
+	uint8_t bDescriptorType;	/**< STRING descriptor type. */
+	uint16_t wLANGID[];		/**< LANGID codes. */
 };
 
 /** USB String Descriptor. See USB 1.1 spec, pp. 204 - 205 */
 struct usb_string_descriptor {
-	uint8_t bLength;	/* /< Size of this descriptor in bytes. */
-	uint8_t bDescriptorType;/* /< STRING descriptor type. */
-	uint16_t bString[];	/* /< UNICODE encoded string. */
+	uint8_t bLength;		/**< Size of this descriptor in bytes. */
+	uint8_t bDescriptorType;	/**< STRING descriptor type. */
+	uint16_t bString[];		/**< UNICODE encoded string. */
 };
 
 /********************** USB Control Endpoint 0 related *********************/
 
 /** USB Control Setup Data. See USB 1.1 spec, pp. 183 - 185 */
 struct setup_data {
-	uint8_t bmRequestType;	/* /< Characteristics of a request. */
-	uint8_t bRequest;	/* /< Specific request. */
-	uint16_t wValue;	/* /< Field that varies according to request. */
-	uint16_t wIndex;	/* /< Field that varies according to request. */
-	uint16_t wLength;	/* /< Number of bytes to transfer in data stage. */
+	uint8_t bmRequestType;		/**< Characteristics of a request. */
+	uint8_t bRequest;		/**< Specific request. */
+	uint16_t wValue;		/**< Field that varies according to request. */
+	uint16_t wIndex;		/**< Field that varies according to request. */
+	uint16_t wLength;		/**< Number of bytes to transfer in data stage. */
 };
 
 /* External declarations for variables that need to be accessed outside of
diff --git a/src/jtag/drivers/OpenULINK/src/jtag.c b/src/jtag/drivers/OpenULINK/src/jtag.c
index 8940fc6f..9f45ea78 100644
--- a/src/jtag/drivers/OpenULINK/src/jtag.c
+++ b/src/jtag/drivers/OpenULINK/src/jtag.c
@@ -101,7 +101,7 @@ void jtag_scan_in(uint8_t out_offset, uint8_t in_offset)
 			tms_sequence_end = tms_sequence_end >> 1;
 		}
 
-		OUTB = outb_buffer;	/* TCK change here */
+		OUTB = outb_buffer;	/* TCK changes here */
 		tdo_data = tdo_data >> 1;
 		OUTB = (outb_buffer | PIN_TCK);
 
@@ -183,7 +183,7 @@ void jtag_slow_scan_in(uint8_t out_offset, uint8_t in_offset)
 			tms_sequence_end = tms_sequence_end >> 1;
 		}
 
-		OUTB = outb_buffer;	/* TCK change here */
+		OUTB = outb_buffer;	/* TCK changes here */
 		for (k = 0; k < delay_scan_in; k++)
 			;
 		tdo_data = tdo_data >> 1;
@@ -662,7 +662,7 @@ void jtag_slow_clock_tms(uint8_t count, uint8_t sequence)
  * Get current JTAG signal states.
  *
  * @return a 16-bit integer where the most-significant byte contains the state
- *  of the JTAG input signals and the least-significant byte cotains the state
+ *  of the JTAG input signals and the least-significant byte contains the state
  *  of the JTAG output signals.
  */
 uint16_t jtag_get_signals(void)
diff --git a/src/jtag/drivers/ulink.c b/src/jtag/drivers/ulink.c
index 94f6c315..9a7d8c8e 100644
--- a/src/jtag/drivers/ulink.c
+++ b/src/jtag/drivers/ulink.c
@@ -123,14 +123,14 @@ enum ulink_delay_type {
  * The last command sets #needs_postprocessing to true.
  */
 struct ulink_cmd {
-	uint8_t id;		/* /< ULINK command ID */
+	uint8_t id;			/**< ULINK command ID */
 
-	uint8_t *payload_out;	/* /< OUT direction payload data */
-	uint8_t payload_out_size;	/* /< OUT direction payload size for this command */
+	uint8_t *payload_out;		/**< OUT direction payload data */
+	uint8_t payload_out_size;	/**< OUT direction payload size for this command */
 
-	uint8_t *payload_in_start;	/* /< Pointer to first element of IN payload array */
-	uint8_t *payload_in;	/* /< Pointer where IN payload shall be stored */
-	uint8_t payload_in_size;/* /< IN direction payload size for this command */
+	uint8_t *payload_in_start;	/**< Pointer to first element of IN payload array */
+	uint8_t *payload_in;		/**< Pointer where IN payload shall be stored */
+	uint8_t payload_in_size;	/**< IN direction payload size for this command */
 
 	/** Indicates if this command needs post-processing */
 	bool needs_postprocessing;
@@ -141,7 +141,7 @@ struct ulink_cmd {
 	/** Pointer to corresponding OpenOCD command for post-processing */
 	struct jtag_command *cmd_origin;
 
-	struct ulink_cmd *next;	/* /< Pointer to next command (linked list) */
+	struct ulink_cmd *next;		/**< Pointer to next command (linked list) */
 };
 
 /** Describes one driver instance */
@@ -150,15 +150,15 @@ struct ulink {
 	struct libusb_device_handle *usb_device_handle;
 	enum ulink_type type;
 
-	int delay_scan_in;	/* /< Delay value for SCAN_IN commands */
-	int delay_scan_out;	/* /< Delay value for SCAN_OUT commands */
-	int delay_scan_io;	/* /< Delay value for SCAN_IO commands */
-	int delay_clock_tck;	/* /< Delay value for CLOCK_TMS commands */
-	int delay_clock_tms;	/* /< Delay value for CLOCK_TCK commands */
+	int delay_scan_in;	/**< Delay value for SCAN_IN commands */
+	int delay_scan_out;	/**< Delay value for SCAN_OUT commands */
+	int delay_scan_io;	/**< Delay value for SCAN_IO commands */
+	int delay_clock_tck;	/**< Delay value for CLOCK_TMS commands */
+	int delay_clock_tms;	/**< Delay value for CLOCK_TCK commands */
 
-	int commands_in_queue;	/* /< Number of commands in queue */
-	struct ulink_cmd *queue_start;	/* /< Pointer to first command in queue */
-	struct ulink_cmd *queue_end;	/* /< Pointer to last command in queue */
+	int commands_in_queue;		/**< Number of commands in queue */
+	struct ulink_cmd *queue_start;	/**< Pointer to first command in queue */
+	struct ulink_cmd *queue_end;	/**< Pointer to last command in queue */
 };
 
 /**************************** Function Prototypes *****************************/
@@ -517,8 +517,8 @@ void ulink_print_signal_states(uint8_t input_signals, uint8_t output_signals)
 		(input_signals  & SIGNAL_TDO   ? 1 : 0),
 		(output_signals & SIGNAL_TMS   ? 1 : 0),
 		(output_signals & SIGNAL_TCK   ? 1 : 0),
-		(output_signals & SIGNAL_TRST  ? 0 : 1),/* TRST and RESET are inverted */
-		(output_signals & SIGNAL_RESET ? 0 : 1));	/* by hardware */
+		(output_signals & SIGNAL_TRST  ? 0 : 1),	/* Inverted by hardware */
+		(output_signals & SIGNAL_RESET ? 0 : 1));	/* Inverted by hardware */
 }
 
 /**************** OpenULINK command generation helper functions ***************/