diff options
author | Øyvind Harboe <oyvind.harboe@zylin.com> | 2011-11-01 22:53:54 +0100 |
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committer | Peter Stuge <peter@stuge.se> | 2011-11-01 22:12:59 +0000 |
commit | 2ea7a42e22b0a5df0fc9fd8b4db4b154cb4be228 (patch) | |
tree | f69f4f0b00d705829d0e313d665659ffcd0f3ae3 /src/target | |
parent | 06216744ed1bae8a92333c13ae9b1e270e4c0747 (diff) |
cortex_m: add missing error checking
found by clang.
Change-Id: I099c6fe6b044dba36c20221cb439bdcba5a6bb6f
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
Reviewed-on: http://openocd.zylin.com/152
Tested-by: jenkins
Reviewed-by: Peter Stuge <peter@stuge.se>
Diffstat (limited to 'src/target')
-rw-r--r-- | src/target/cortex_m.c | 8 |
1 files changed, 6 insertions, 2 deletions
diff --git a/src/target/cortex_m.c b/src/target/cortex_m.c index 8000b9a8..2a283cdb 100644 --- a/src/target/cortex_m.c +++ b/src/target/cortex_m.c @@ -124,16 +124,20 @@ static int cortexm3_dap_write_coreregister_u32(struct adiv5_dap *swjdp, if (retval != ERROR_OK) return retval; retval = dap_queue_ap_write(swjdp, AP_REG_BD0 | (DCB_DCRDR & 0xC), value); - // XXX check retval + if (retval != ERROR_OK) + return retval; /* mem_ap_write_u32(swjdp, DCB_DCRSR, i | DCRSR_WnR); */ retval = dap_setup_accessport(swjdp, CSW_32BIT | CSW_ADDRINC_OFF, DCB_DCRSR & 0xFFFFFFF0); if (retval != ERROR_OK) return retval; retval = dap_queue_ap_write(swjdp, AP_REG_BD0 | (DCB_DCRSR & 0xC), regnum | DCRSR_WnR); - // XXX check retval + if (retval != ERROR_OK) + return retval; retval = dap_run(swjdp); + if (retval != ERROR_OK) + return retval; /* restore DCB_DCRDR - this needs to be in a seperate * transaction otherwise the emulated DCC channel breaks */ |