diff options
author | David Brownell <dbrownell@users.sourceforge.net> | 2009-11-17 23:50:23 -0800 |
---|---|---|
committer | David Brownell <dbrownell@users.sourceforge.net> | 2009-11-17 23:50:23 -0800 |
commit | ec93209f51afc09e273a4742dc0b5f2cefc15e76 (patch) | |
tree | 6bf54fc3fd13c57abca9db8424a52155be95f848 /src/target/xscale.c | |
parent | d6c8945662e6027f6ba12d73bac2473088672db5 (diff) |
ARM: add arm_mode_name()
Add and use arm_mode_name() to map from PSR bits to user
meaningful names. It uses a new table which, later, can
be used to hold other mode-coupled data.
Add definitions for the "Secure Monitor" mode, as seen on
some ARM11 cores (like ARM1176) and on Cortex-A8. The
previous mode name scheme didn't understand that mode.
Remove the old mechanism ... there were two copies, caused
by Cortex-A8 needing to add "Secure Monitor" mode support.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Diffstat (limited to 'src/target/xscale.c')
-rw-r--r-- | src/target/xscale.c | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/src/target/xscale.c b/src/target/xscale.c index a4a8eabd..38928f41 100644 --- a/src/target/xscale.c +++ b/src/target/xscale.c @@ -857,7 +857,7 @@ static int xscale_arch_state(struct target *target) "%s", armv4_5_state_strings[armv4_5->core_state], Jim_Nvp_value2name_simple(nvp_target_debug_reason, target->debug_reason)->name , - armv4_5_mode_strings[armv4_5_mode_to_number(armv4_5->core_mode)], + arm_mode_name(armv4_5->core_mode), buf_get_u32(armv4_5->core_cache->reg_list[ARMV4_5_CPSR].value, 0, 32), buf_get_u32(armv4_5->core_cache->reg_list[15].value, 0, 32), state[xscale->armv4_5_mmu.mmu_enabled], @@ -960,7 +960,8 @@ static int xscale_debug_entry(struct target *target) LOG_ERROR("cpsr contains invalid mode value - communication failure"); return ERROR_TARGET_FAILURE; } - LOG_DEBUG("target entered debug state in %s mode", armv4_5_mode_strings[armv4_5_mode_to_number(armv4_5->core_mode)]); + LOG_DEBUG("target entered debug state in %s mode", + arm_mode_name(armv4_5->core_mode)); if (buffer[9] & 0x20) armv4_5->core_state = ARMV4_5_STATE_THUMB; |