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authorHsiangkai Wang <hsiangkai@gmail.com>2013-02-05 11:55:37 +0800
committerSpencer Oliver <spen@spen-soft.co.uk>2013-06-05 19:27:35 +0000
commitcf8a3c3d7075abad3c88cd604f8add4d06898abc (patch)
tree56f8b5794fd385ba7ba4a6617c214a9516a443b5 /src/target/nds32_tlb.c
parentceb402dc9e903d2f3f6bc8125dfed9d82b83d2d1 (diff)
nds32: add new target type nds32_v2, nds32_v3, nds32_v3m
Add target code for Andes targets. Change-Id: Ibf0e1b61b06127ca7d9ed502d98d7e2aeebbbe82 Signed-off-by: Hsiangkai Wang <hsiangkai@gmail.com> Reviewed-on: http://openocd.zylin.com/1259 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Diffstat (limited to 'src/target/nds32_tlb.c')
-rw-r--r--src/target/nds32_tlb.c80
1 files changed, 80 insertions, 0 deletions
diff --git a/src/target/nds32_tlb.c b/src/target/nds32_tlb.c
new file mode 100644
index 00000000..58322cf1
--- /dev/null
+++ b/src/target/nds32_tlb.c
@@ -0,0 +1,80 @@
+/***************************************************************************
+ * Copyright (C) 2013 Andes Technology *
+ * Hsiangkai Wang <hkwang@andestech.com> *
+ * *
+ * This program is free software; you can redistribute it and/or modify *
+ * it under the terms of the GNU General Public License as published by *
+ * the Free Software Foundation; either version 2 of the License, or *
+ * (at your option) any later version. *
+ * *
+ * This program is distributed in the hope that it will be useful, *
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of *
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
+ * GNU General Public License for more details. *
+ * *
+ * You should have received a copy of the GNU General Public License *
+ * along with this program; if not, write to the *
+ * Free Software Foundation, Inc., *
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
+ ***************************************************************************/
+#ifdef HAVE_CONFIG_H
+#include "config.h"
+#endif
+
+#include "nds32_aice.h"
+#include "nds32_tlb.h"
+
+int nds32_probe_tlb(struct nds32 *nds32, const uint32_t virtual_address,
+ uint32_t *physical_address)
+{
+ struct target *target = nds32->target;
+ struct aice_port_s *aice = target_to_aice(target);
+
+ return aice_read_tlb(aice, virtual_address, physical_address);
+}
+
+struct page_table_walker_info_s page_table_info[PAGE_SIZE_NUM] = {
+ /* 4K page */
+ {0xFFC00000, 20, 0x003FF000, 10, 0x00000FFF, 0xFFFFF000, 0xFFFFF000, 0xFFFFF000},
+ /* 8K page */
+ {0xFF000000, 22, 0x00FFE000, 11, 0x00001FFF, 0xFFFFF000, 0xFFFFE000, 0xFFFFE000},
+};
+
+int nds32_walk_page_table(struct nds32 *nds32, const uint32_t virtual_address,
+ uint32_t *physical_address)
+{
+ struct target *target = nds32->target;
+ uint32_t value_mr1;
+ uint32_t load_address;
+ uint32_t L1_page_table_entry;
+ uint32_t L2_page_table_entry;
+ uint32_t page_size_index = nds32->mmu_config.default_min_page_size;
+ struct page_table_walker_info_s *page_table_info_p =
+ &(page_table_info[page_size_index]);
+
+ /* Read L1 Physical Page Table */
+ nds32_get_mapped_reg(nds32, MR1, &value_mr1);
+ load_address = (value_mr1 & page_table_info_p->L1_base_mask) |
+ ((virtual_address & page_table_info_p->L1_offset_mask) >>
+ page_table_info_p->L1_offset_shift);
+ /* load_address is physical address */
+ nds32_read_buffer(target, load_address, 4, (uint8_t *)&L1_page_table_entry);
+
+ /* Read L2 Physical Page Table */
+ if (L1_page_table_entry & 0x1) /* L1_PTE not present */
+ return ERROR_FAIL;
+
+ load_address = (L1_page_table_entry & page_table_info_p->L2_base_mask) |
+ ((virtual_address & page_table_info_p->L2_offset_mask) >>
+ page_table_info_p->L2_offset_shift);
+ /* load_address is physical address */
+ nds32_read_buffer(target, load_address, 4, (uint8_t *)&L2_page_table_entry);
+
+ if ((L2_page_table_entry & 0x1) != 0x1) /* L2_PTE not valid */
+ return ERROR_FAIL;
+
+ *physical_address = (L2_page_table_entry & page_table_info_p->ppn_mask) |
+ (virtual_address & page_table_info_p->va_offset_mask);
+
+ return ERROR_OK;
+}