aboutsummaryrefslogtreecommitdiff
path: root/src/target/mips_m4k.c
diff options
context:
space:
mode:
authorSalvador Arroyo <sarroyofdez@yahoo.es>2013-02-24 17:05:28 +0100
committerSpencer Oliver <spen@spen-soft.co.uk>2013-04-02 15:14:41 +0000
commit37a6e402502d698aaf9d4f6d32fe4ccdcc5ff9b6 (patch)
treed190d3fa4a5a115ca0a500d2d8eab2cf1116a785 /src/target/mips_m4k.c
parent2dde122b66b3bf1a4d3c2798fb4b369b66de9309 (diff)
mips: change in restoring debug working register
In current devel code there are 3 functions (related to m4k code) that need to restore register 8 from pracc stack: mips32_pracc_read_u32() mips32_cp0_read() mips32_pracc_write_mem_generic() And mips32_pracc_read_mem() needs to restore regs 8 and 9 from pracc stack. Values in this registers should be the same as read by mips32_pracc_read_regs() when entering debug mode and can be modified by mips32_pracc_write_regs() when leaving debug mode. There is no need to read their values from the processor registers every time. The fields reg8 and reg9 are added to struct mips_ejtag to store these register values and the call to mips32_save_context() is shifted in mips_m4k_debug_entry() in order to store them before any other function needs to restore these registers. For the same reason in function mips_m4k_step() the call to mips_m4k_set_breakpoint(), if needed, should be made after calling mips_m4k_debug_entry(). For single word write the number of pracc accesses are now 9 or 8, from 13 or 12 in current code, single word read takes now 10 instead of 12. This patch is really the first in a set of patches for an alternate m4k pracc code much faster that current code. At least for me with pic32mx works fine. Change-Id: Ibd9df5e8b9f78ce05a180949ba6a561c761b61d6 Signed-off-by: Salvador Arroyo <sarroyofdez@yahoo.es> Reviewed-on: http://openocd.zylin.com/1146 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Diffstat (limited to 'src/target/mips_m4k.c')
-rw-r--r--src/target/mips_m4k.c10
1 files changed, 5 insertions, 5 deletions
diff --git a/src/target/mips_m4k.c b/src/target/mips_m4k.c
index fb4c3762..485f4e8c 100644
--- a/src/target/mips_m4k.c
+++ b/src/target/mips_m4k.c
@@ -90,14 +90,14 @@ static int mips_m4k_debug_entry(struct target *target)
/* make sure stepping disabled, SSt bit in CP0 debug register cleared */
mips_ejtag_config_step(ejtag_info, 0);
+ mips32_save_context(target);
+
/* make sure break unit configured */
mips32_configure_break_unit(target);
/* attempt to find halt reason */
mips_m4k_examine_debug_reason(target);
- mips32_save_context(target);
-
/* default to mips32 isa, it will be changed below if required */
mips32->isa_mode = MIPS32_ISA_MIPS32;
@@ -558,12 +558,12 @@ static int mips_m4k_step(struct target *target, int current,
/* registers are now invalid */
register_cache_invalidate(mips32->core_cache);
+ LOG_DEBUG("target stepped ");
+ mips_m4k_debug_entry(target);
+
if (breakpoint)
mips_m4k_set_breakpoint(target, breakpoint);
- LOG_DEBUG("target stepped ");
-
- mips_m4k_debug_entry(target);
target_call_event_callbacks(target, TARGET_EVENT_HALTED);
return ERROR_OK;