diff options
| author | Salvador Arroyo <sarroyofdez@yahoo.es> | 2012-10-30 23:15:35 +0100 |
|---|---|---|
| committer | Spencer Oliver <spen@spen-soft.co.uk> | 2012-11-16 12:40:14 +0000 |
| commit | 47d5f44fe0401746b3239ea43994889c41c0ca5e (patch) | |
| tree | 7ab78dad76097a30db5bb899e964dfe207814450 /src/target/mips32.h | |
| parent | 115b7be42610cd276bab2f9b08a7e11e05cc889e (diff) | |
mips: optimize mips_ejtag_step_disable() code
The code is a bit large compared to mips_ejtag_step_enable().
With the mips32 xori instruction the code can be
reused.
The number of pracc accesses are reduced from 18 to 7.
Change-Id: If3974ebd64da4461c22b089796646990e68e1b72
Signed-off-by: Salvador Arroyo <sarroyofdez@yahoo.es>
Reviewed-on: http://openocd.zylin.com/944
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Diffstat (limited to 'src/target/mips32.h')
| -rw-r--r-- | src/target/mips32.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/src/target/mips32.h b/src/target/mips32.h index a5bccdc2..0bdfc596 100644 --- a/src/target/mips32.h +++ b/src/target/mips32.h @@ -144,6 +144,7 @@ struct mips32_algorithm { #define MIPS32_OP_SH 0x29 #define MIPS32_OP_SW 0x2B #define MIPS32_OP_ORI 0x0D +#define MIPS32_OP_XORI 0x0E #define MIPS32_OP_XOR 0x26 #define MIPS32_OP_SLTU 0x2B #define MIPS32_OP_SRL 0x03 @@ -186,6 +187,7 @@ struct mips32_algorithm { #define MIPS32_MTLO(reg) MIPS32_R_INST(0, reg, 0, 0, 0, MIPS32_OP_MTLO) #define MIPS32_MTHI(reg) MIPS32_R_INST(0, reg, 0, 0, 0, MIPS32_OP_MTHI) #define MIPS32_ORI(tar, src, val) MIPS32_I_INST(MIPS32_OP_ORI, src, tar, val) +#define MIPS32_XORI(tar, src, val) MIPS32_I_INST(MIPS32_OP_XORI, src, tar, val) #define MIPS32_RDHWR(tar, dst) MIPS32_R_INST(MIPS32_OP_SPECIAL3, 0, tar, dst, 0, MIPS32_OP_RDHWR) #define MIPS32_SB(reg, off, base) MIPS32_I_INST(MIPS32_OP_SB, base, reg, off) #define MIPS32_SH(reg, off, base) MIPS32_I_INST(MIPS32_OP_SH, base, reg, off) |