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author | Drasko DRASKOVIC <drasko.draskovic@gmail.com> | 2011-07-07 17:59:13 +0200 |
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committer | Øyvind Harboe <oyvind.harboe@zylin.com> | 2011-08-09 23:17:28 +0200 |
commit | c18e02387b0628a9ecfc41a65af4802e8b95357e (patch) | |
tree | e5c0ebe5c2bf3ef8ce0ec7bf83b0a6d0b9f5c9a3 /src/target/etm.h | |
parent | 1be7163408cc6420d85bf990a2dae46c559a12b1 (diff) |
mips32: Sync Caches to Make Instr Writes Effective
Pprogram that loads another program into memory is actually writing the
D- side cache.
The instructions it has loaded can't be executed until they reach the
I-cache.
After the instructions have been written, the loader should arrange to
write back any containing D-cache line and invalidate any locations
already in the I-cache.
For the MIPS Architecture Release2 cores, we can use synci command
that does this job.
For Release1 we must use "cache" instruction.
Diffstat (limited to 'src/target/etm.h')
0 files changed, 0 insertions, 0 deletions