diff options
author | drath <drath@b42882b7-edfa-0310-969c-e2dbd0fdcd60> | 2006-09-28 10:41:43 +0000 |
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committer | drath <drath@b42882b7-edfa-0310-969c-e2dbd0fdcd60> | 2006-09-28 10:41:43 +0000 |
commit | a582e9a8d183c56d1aa8ae18afc1c11e2cbd6d2d (patch) | |
tree | bc069458c57c3bb587df10d5bd257d5f49657e68 /src/target/etm.c | |
parent | b855855445489c43de2b796f1ac921e518d787bd (diff) |
- str9x flash support (Thanks to Spencer Oliver)
- str75x flash support (Thanks to Spencer Oliver)
- correct reporting of T-Bit in CPSR (Thanks to John Hartman for reporting this)
- core-state (ARM/Thumb) can be switched by modifying CPSR
- fixed bug in gdb_server register handling
- register values > 32-bit should now be supported
- several minor fixes and enhancements
git-svn-id: svn://svn.berlios.de/openocd/trunk@100 b42882b7-edfa-0310-969c-e2dbd0fdcd60
Diffstat (limited to 'src/target/etm.c')
-rw-r--r-- | src/target/etm.c | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/src/target/etm.c b/src/target/etm.c index a6b63451..9c82acc9 100644 --- a/src/target/etm.c +++ b/src/target/etm.c @@ -199,6 +199,7 @@ int etm_reg_arch_type = -1; int etm_get_reg(reg_t *reg); int etm_set_reg(reg_t *reg, u32 value); +int etm_set_reg_w_exec(reg_t *reg, u8 *buf); int etm_write_reg(reg_t *reg, u32 value); int etm_read_reg(reg_t *reg); @@ -338,9 +339,9 @@ int etm_set_reg(reg_t *reg, u32 value) return ERROR_OK; } -int etm_set_reg_w_exec(reg_t *reg, u32 value) +int etm_set_reg_w_exec(reg_t *reg, u8 *buf) { - etm_set_reg(reg, value); + etm_set_reg(reg, buf_get_u32(buf, 0, reg->size)); if (jtag_execute_queue() != ERROR_OK) { |