diff options
author | David Brownell <dbrownell@users.sourceforge.net> | 2009-12-07 14:54:12 -0800 |
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committer | David Brownell <dbrownell@users.sourceforge.net> | 2009-12-07 14:57:43 -0800 |
commit | a4a2808c2a849eddd5d7d454c048ffdfd89ca9c6 (patch) | |
tree | 25c8eccb1e9cfafdf61b1f6ed5dc940f24c489c6 /src/target/cortex_m3.c | |
parent | 7b0314c377cc7c6a90db34d6d3e9e723d6d2b94a (diff) |
ARM: move opcode macros to <target/arm_opcodes.h>
Move the ARM opcode macros from <target/armv4_5.h>, and a few
Thumb2 ones from <target/armv7m.h>, to more appropriate homes
in a new <target/arm_opcodes.h> file.
Removed duplicate opcodes from that v7m/Thumb2 set. Protected
a few macro argument references by adding missing parentheses.
Tightening up some of the line lengths turned up a curious artifact:
the macros for the Thumb opcodes are all 32 bits wide, not 16 bits.
There's currently no explanation for why it's done that way...
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Diffstat (limited to 'src/target/cortex_m3.c')
-rw-r--r-- | src/target/cortex_m3.c | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/src/target/cortex_m3.c b/src/target/cortex_m3.c index 195a3b9a..558b2117 100644 --- a/src/target/cortex_m3.c +++ b/src/target/cortex_m3.c @@ -37,6 +37,7 @@ #include "target_type.h" #include "arm_disassembler.h" #include "register.h" +#include "arm_opcodes.h" /* NOTE: most of this should work fine for the Cortex-M1 and @@ -880,7 +881,7 @@ cortex_m3_set_breakpoint(struct target *target, struct breakpoint *breakpoint) else if (breakpoint->type == BKPT_SOFT) { uint8_t code[4]; - buf_set_u32(code, 0, 32, ARMV7M_T_BKPT(0x11)); + buf_set_u32(code, 0, 32, ARMV5_T_BKPT(0x11)); if ((retval = target_read_memory(target, breakpoint->address & 0xFFFFFFFE, breakpoint->length, 1, breakpoint->orig_instr)) != ERROR_OK) { return retval; |