diff options
author | David Brownell <dbrownell@users.sourceforge.net> | 2010-02-21 14:48:04 -0800 |
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committer | David Brownell <dbrownell@users.sourceforge.net> | 2010-02-21 14:48:04 -0800 |
commit | 249263d29da11b0ec981c2e0d520cd7dcf08939b (patch) | |
tree | e43b4204f3a8d5e2048c1552157a27063c845237 /src/target/cortex_a8.c | |
parent | 1aac72d24339380f6e98c50dec4c96ab30537749 (diff) |
ADIv5 clean up AP selection and register caching
Handling of AP (and AP register bank) selection, and cached AP
registers, is pretty loose ... start tightening it:
- It's "AP bank" select support ... there are no DP banks. Rename.
+ dap_dp_bankselect() becomes dap_ap_bankselect()
+ "dp_select_value" struct field becomes "ap_bank_value"
- Remove duplicate AP cache init paths ... only use dap_ap_select(),
and don't make Cortex (A8 or M3) cores roll their own code.
- For dap_ap_bankselect(), pass up any fault code from writing
the SELECT register. (Nothing yet checks those codes.)
- Add various bits of Doxygen
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Diffstat (limited to 'src/target/cortex_a8.c')
-rw-r--r-- | src/target/cortex_a8.c | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/src/target/cortex_a8.c b/src/target/cortex_a8.c index 050238ce..f4818f8d 100644 --- a/src/target/cortex_a8.c +++ b/src/target/cortex_a8.c @@ -53,7 +53,9 @@ static int cortex_a8_dap_write_coreregister_u32(struct target *target, uint32_t value, int regnum); /* * FIXME do topology discovery using the ROM; don't - * assume this is an OMAP3. + * assume this is an OMAP3. Also, allow for multiple ARMv7-A + * cores, with different AP numbering ... don't use a #define + * for these numbers, use per-core armv7a state. */ #define swjdp_memoryap 0 #define swjdp_debugap 1 @@ -1570,9 +1572,7 @@ static int cortex_a8_init_arch_info(struct target *target, cortex_a8->jtag_info.tap = tap; cortex_a8->jtag_info.scann_size = 4; - swjdp->dp_select_value = -1; - swjdp->ap_csw_value = -1; - swjdp->ap_tar_value = -1; + /* Leave (only) generic DAP stuff for debugport_init() */ swjdp->jtag_info = &cortex_a8->jtag_info; swjdp->memaccess_tck = 80; |