diff options
| author | Matthias Welwarsky <matthias@welwarsky.de> | 2015-10-16 10:10:02 +0200 |
|---|---|---|
| committer | Paul Fertser <fercerpav@gmail.com> | 2015-11-30 05:41:58 +0000 |
| commit | d17c11759fa0b183dd9a9837534e9d6849a8db14 (patch) | |
| tree | 394af38a783e1af7d80a74aa0b51c2b284ff6b46 /src/target/cortex_a.c | |
| parent | 7986faba21f29b50341f8357baf38481dae0e58f (diff) | |
armv7a: rework automatic flush-on-write handling
The following changes are implemented:
- Clean&Invalidate the VA range to PoC *before* the write takes place
- Remove SMP handling since DCCIMVA instruction already maintains SMP
coherence.
- Remove separate Invalidate step
Change-Id: I19fd3cc226d8ecf2937276fc63258b6a26e369a7
Signed-off-by: Matthias Welwarsky <matthias@welwarsky.de>
Reviewed-on: http://openocd.zylin.com/3027
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
Tested-by: jenkins
Diffstat (limited to 'src/target/cortex_a.c')
| -rw-r--r-- | src/target/cortex_a.c | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/src/target/cortex_a.c b/src/target/cortex_a.c index f9c92736..39e59ae7 100644 --- a/src/target/cortex_a.c +++ b/src/target/cortex_a.c @@ -2754,10 +2754,12 @@ static int cortex_a_write_memory(struct target *target, uint32_t address, if (retval != ERROR_OK) return retval; } - retval = cortex_a_write_apb_ab_memory(target, address, size, count, buffer); + /* memory writes bypass the caches, must flush before writing */ armv7a_cache_auto_flush_on_write(target, address, size * count); + retval = cortex_a_write_apb_ab_memory(target, address, size, count, buffer); + return retval; } |