diff options
author | David Brownell <dbrownell@users.sourceforge.net> | 2010-01-13 03:16:37 -0800 |
---|---|---|
committer | David Brownell <dbrownell@users.sourceforge.net> | 2010-01-13 03:17:23 -0800 |
commit | d91941d5a01ca0b9d43571edc03ba18741076cca (patch) | |
tree | 256234bf00622a98771f3d0634c196a4082356a9 /src/target/armv7m.h | |
parent | b8e930e3bfc78f4a0582edb8b7cec44b5c9f4cad (diff) |
Cortex-M3: improved core exception handling
This updates three aspects of debugger/exception interactions:
- Save the user's "vector_catch" setting, and restore it after reset.
Previously, it was obliterated (rather annoyingly) each time.
- Don't catch BusFault and HardFault exceptions unless the user says
to do so. Target firmware may need to handle them.
- Don't modify SHCSR to prevent escalating BusFault to HardFault.
Target firmware may expect to handle it as a HardFault.
Those simplifications fix several bugs. In one annoying case, OpenOCD
would cause the target to lock up on ome faults which triggered after
the debugger disconnected.
NOTE: a known remaining issue is that OpenOCD can still leave DEMCR
set after an otherwise-clean OpenOCD shutdown.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Diffstat (limited to 'src/target/armv7m.h')
-rw-r--r-- | src/target/armv7m.h | 9 |
1 files changed, 7 insertions, 2 deletions
diff --git a/src/target/armv7m.h b/src/target/armv7m.h index ac559b9e..86caae21 100644 --- a/src/target/armv7m.h +++ b/src/target/armv7m.h @@ -106,9 +106,14 @@ struct armv7m_common int exception_number; struct swjdp_common swjdp_info; + uint32_t demcr; + /* Direct processor core register read and writes */ - int (*load_core_reg_u32)(struct target *target, enum armv7m_regtype type, uint32_t num, uint32_t *value); - int (*store_core_reg_u32)(struct target *target, enum armv7m_regtype type, uint32_t num, uint32_t value); + int (*load_core_reg_u32)(struct target *target, + enum armv7m_regtype type, uint32_t num, uint32_t *value); + int (*store_core_reg_u32)(struct target *target, + enum armv7m_regtype type, uint32_t num, uint32_t value); + /* register cache to processor synchronization */ int (*read_core_reg)(struct target *target, unsigned num); int (*write_core_reg)(struct target *target, unsigned num); |