diff options
author | David Brownell <dbrownell@users.sourceforge.net> | 2010-02-21 14:34:33 -0800 |
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committer | David Brownell <dbrownell@users.sourceforge.net> | 2010-02-21 14:34:33 -0800 |
commit | 1aac72d24339380f6e98c50dec4c96ab30537749 (patch) | |
tree | efd8b83082f072d807f168eabf415e1002cf5425 /src/target/armv4_5.c | |
parent | a299371a9ec109da3851cb43aed3e9157d095358 (diff) |
ARM: keep a handle to the PC
Keep a handle to the PC in "struct arm", and use it.
This register is used a fair amount, so this is a net
minor code shrink (other than some line length fixes),
but mostly it's to make things more readable.
For XScale, fix a dodgy sequence while stepping. It
was initializing a variable to a non-NULL value, then
updating it to handle the step-over-active-breakpoint
case, and then later testing for non-NULL to see if
it should reverse that step-over-active logic. It
should have done like ARM7/ARM9 does: init to NULL.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Diffstat (limited to 'src/target/armv4_5.c')
-rw-r--r-- | src/target/armv4_5.c | 9 |
1 files changed, 4 insertions, 5 deletions
diff --git a/src/target/armv4_5.c b/src/target/armv4_5.c index 8d3a8917..a4a15b40 100644 --- a/src/target/armv4_5.c +++ b/src/target/armv4_5.c @@ -577,6 +577,7 @@ struct reg_cache *arm_build_reg_cache(struct target *target, struct arm *arm) cache->num_regs++; } + arm->pc = reg_list + 15; arm->cpsr = reg_list + ARMV4_5_CPSR; arm->core_cache = cache; return cache; @@ -598,8 +599,7 @@ int arm_arch_state(struct target *target) debug_reason_name(target), arm_mode_name(armv4_5->core_mode), buf_get_u32(armv4_5->cpsr->value, 0, 32), - buf_get_u32(armv4_5->core_cache->reg_list[15].value, - 0, 32), + buf_get_u32(armv4_5->pc->value, 0, 32), armv4_5->is_semihosting ? ", semihosting" : ""); return ERROR_OK; @@ -1018,11 +1018,10 @@ static int armv4_5_run_algorithm_completion(struct target *target, uint32_t exit } /* fast exit: ARMv5+ code can use BKPT */ - if (exit_point && buf_get_u32(armv4_5->core_cache->reg_list[15].value, - 0, 32) != exit_point) + if (exit_point && buf_get_u32(armv4_5->pc->value, 0, 32) != exit_point) { LOG_WARNING("target reentered debug state, but not at the desired exit point: 0x%4.4" PRIx32 "", - buf_get_u32(armv4_5->core_cache->reg_list[15].value, 0, 32)); + buf_get_u32(armv4_5->pc->value, 0, 32)); return ERROR_TARGET_TIMEOUT; } |