diff options
author | David Brownell <dbrownell@users.sourceforge.net> | 2009-11-24 01:27:29 -0800 |
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committer | David Brownell <dbrownell@users.sourceforge.net> | 2009-11-24 01:27:29 -0800 |
commit | 3efc99b34a934cb4d657ec27a164769c46c10f28 (patch) | |
tree | c08b985f274dc428f4c769f20e471b8ca81879c7 /src/target/arm11.h | |
parent | ec64acf536942168b4e038c6720c83687d3a0d08 (diff) |
ARM11: remove old R0..R15/CPSR code
This finishes the basic switchover to the new register code,
for everything except the debug registers. (And maybe we
shouldn't have a cache for *those* which works this way...)
The context save/restore code now uses the new code, but
it's in a slightly different sequence. That should be fine
since the R0/PC/CPSR stuff is all that really matters (and
if we can update those, we can update the rest).
Now there's no longer a way any code can be confused about
which copy of "r1" (etc) to use.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Diffstat (limited to 'src/target/arm11.h')
-rw-r--r-- | src/target/arm11.h | 5 |
1 files changed, 2 insertions, 3 deletions
diff --git a/src/target/arm11.h b/src/target/arm11.h index 033ba899..c3f4e864 100644 --- a/src/target/arm11.h +++ b/src/target/arm11.h @@ -26,8 +26,7 @@ #include "armv4_5.h" #include "arm_dpm.h" -/* TEMPORARY -- till we switch to the shared infrastructure */ -#define ARM11_REGCACHE_COUNT 20 +#define ARM11_REGCACHE_COUNT 3 #define ARM11_TAP_DEFAULT TAP_INVALID @@ -70,7 +69,7 @@ struct arm11_common bool simulate_reset_on_next_halt; /**< Perform cleanups of the ARM state on next halt */ - /** \name Shadow registers to save processor state */ + /** \name Shadow registers to save debug state */ /*@{*/ struct reg * reg_list; /**< target register list */ |