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authorSpencer Oliver <spen@spen-soft.co.uk>2012-02-05 12:03:04 +0000
committerSpencer Oliver <spen@spen-soft.co.uk>2012-02-06 11:00:36 +0000
commit374127301ec1d72033b9d573b72c7abdfd61990d (patch)
treeb56f5f4bba1718f9ac482d1fabdff18f5d170196 /src/target/arm11.h
parentde0130a0aad83c1ef692ee4d68ab996a8668424d (diff)
build: cleanup src/target directory
Change-Id: Ia055b6d2b5f6449a38afd0539a8c66e7d7e0c059 Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk> Reviewed-on: http://openocd.zylin.com/430 Tested-by: jenkins
Diffstat (limited to 'src/target/arm11.h')
-rw-r--r--src/target/arm11.h53
1 files changed, 24 insertions, 29 deletions
diff --git a/src/target/arm11.h b/src/target/arm11.h
index 9edadee1..fd7af157 100644
--- a/src/target/arm11.h
+++ b/src/target/arm11.h
@@ -26,38 +26,36 @@
#include "arm.h"
#include "arm_dpm.h"
-#define ARM11_TAP_DEFAULT TAP_INVALID
+#define ARM11_TAP_DEFAULT TAP_INVALID
#define CHECK_RETVAL(action) \
do { \
int __retval = (action); \
if (__retval != ERROR_OK) { \
LOG_DEBUG("error while calling \"%s\"", \
- # action ); \
+ # action); \
return __retval; \
} \
} while (0)
/* bits from ARMv7 DIDR */
-enum arm11_debug_version
-{
- ARM11_DEBUG_V6 = 0x01,
- ARM11_DEBUG_V61 = 0x02,
- ARM11_DEBUG_V7 = 0x03,
- ARM11_DEBUG_V7_CP14 = 0x04,
+enum arm11_debug_version {
+ ARM11_DEBUG_V6 = 0x01,
+ ARM11_DEBUG_V61 = 0x02,
+ ARM11_DEBUG_V7 = 0x03,
+ ARM11_DEBUG_V7_CP14 = 0x04,
};
-struct arm11_common
-{
- struct arm arm;
+struct arm11_common {
+ struct arm arm;
/** Debug module state. */
struct arm_dpm dpm;
struct arm11_sc7_action *bpwp_actions;
unsigned bpwp_n;
- size_t brp; /**< Number of Breakpoint Register Pairs from DIDR */
- size_t free_brps; /**< Number of breakpoints allocated */
+ size_t brp; /**< Number of Breakpoint Register Pairs from DIDR */
+ size_t free_brps; /**< Number of breakpoints allocated */
uint32_t dscr; /**< Last retrieved DSCR value. */
@@ -67,7 +65,7 @@ struct arm11_common
bool is_rdtr_saved;
bool is_wdtr_saved;
- bool simulate_reset_on_next_halt; /**< Perform cleanups of the ARM state on next halt */
+ bool simulate_reset_on_next_halt; /**< Perform cleanups of the ARM state on next halt **/
/* Per-core configurable options.
* NOTE that several of these boolean options should not exist
@@ -86,8 +84,7 @@ struct arm11_common
static inline struct arm11_common *target_to_arm11(struct target *target)
{
- return container_of(target->arch_info, struct arm11_common,
- arm);
+ return container_of(target->arch_info, struct arm11_common, arm);
}
/**
@@ -95,27 +92,25 @@ static inline struct arm11_common *target_to_arm11(struct target *target)
*
* http://infocenter.arm.com/help/topic/com.arm.doc.ddi0301f/I1006229.html
*/
-enum arm11_instructions
-{
+enum arm11_instructions {
ARM11_EXTEST = 0x00,
ARM11_SCAN_N = 0x02,
ARM11_RESTART = 0x04,
- ARM11_HALT = 0x08,
+ ARM11_HALT = 0x08,
ARM11_INTEST = 0x0C,
ARM11_ITRSEL = 0x1D,
ARM11_IDCODE = 0x1E,
ARM11_BYPASS = 0x1F,
};
-enum arm11_sc7
-{
- ARM11_SC7_NULL = 0,
- ARM11_SC7_VCR = 7,
- ARM11_SC7_PC = 8,
- ARM11_SC7_BVR0 = 64,
- ARM11_SC7_BCR0 = 80,
- ARM11_SC7_WVR0 = 96,
- ARM11_SC7_WCR0 = 112,
+enum arm11_sc7 {
+ ARM11_SC7_NULL = 0,
+ ARM11_SC7_VCR = 7,
+ ARM11_SC7_PC = 8,
+ ARM11_SC7_BVR0 = 64,
+ ARM11_SC7_BCR0 = 80,
+ ARM11_SC7_WVR0 = 96,
+ ARM11_SC7_WCR0 = 112,
};
-#endif /* ARM11_H */
+#endif /* ARM11_H */