diff options
| author | Steven Stallion <stallion@squareup.com> | 2017-05-03 12:46:11 -0500 |
|---|---|---|
| committer | Matthias Welwarsky <matthias@welwarsky.de> | 2018-10-16 11:58:03 +0100 |
| commit | d92adf8abf6257c2d58ba409731f4d7fa5aa6b5f (patch) | |
| tree | 89d1916c89ad13ae50d81a2f5c07a5a84782265d /src/rtos/rtos_chibios_stackings.c | |
| parent | b5964191f0d2fc3ace607af001df3d57cbfbaf2b (diff) | |
rtos: support gdb_get_register_packet
This patch adds support for p packet responses by targets configured
with RTOS support. This change required moving to a rtos_reg struct,
which is similar to struct reg used by targets, which resulted in
needing to update each stacking with register numbers. This patch also
allows targets with non-linear register numbers to function with RTOSes
as well.
Change-Id: I5b189d74110d6b6f2fa851a67ab0762ae6b1832f
Signed-off-by: Steven Stallion <stallion@squareup.com>
Reviewed-on: http://openocd.zylin.com/4121
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
Diffstat (limited to 'src/rtos/rtos_chibios_stackings.c')
| -rw-r--r-- | src/rtos/rtos_chibios_stackings.c | 68 |
1 files changed, 34 insertions, 34 deletions
diff --git a/src/rtos/rtos_chibios_stackings.c b/src/rtos/rtos_chibios_stackings.c index 3651c49a..2887930b 100644 --- a/src/rtos/rtos_chibios_stackings.c +++ b/src/rtos/rtos_chibios_stackings.c @@ -27,23 +27,23 @@ #include "target/armv7m.h" static const struct stack_register_offset rtos_chibios_arm_v7m_stack_offsets[ARMV7M_NUM_CORE_REGS] = { - { -1, 32 }, /* r0 */ - { -1, 32 }, /* r1 */ - { -1, 32 }, /* r2 */ - { -1, 32 }, /* r3 */ - { 0x00, 32 }, /* r4 */ - { 0x04, 32 }, /* r5 */ - { 0x08, 32 }, /* r6 */ - { 0x0c, 32 }, /* r7 */ - { 0x10, 32 }, /* r8 */ - { 0x14, 32 }, /* r9 */ - { 0x18, 32 }, /* r10 */ - { 0x1c, 32 }, /* r11 */ - { -1, 32 }, /* r12 */ - { -2, 32 }, /* sp */ - { -1, 32 }, /* lr */ - { 0x20, 32 }, /* pc */ - { -1, 32 }, /* xPSR */ + { ARMV7M_R0, -1, 32 }, /* r0 */ + { ARMV7M_R1, -1, 32 }, /* r1 */ + { ARMV7M_R2, -1, 32 }, /* r2 */ + { ARMV7M_R3, -1, 32 }, /* r3 */ + { ARMV7M_R4, 0x00, 32 }, /* r4 */ + { ARMV7M_R5, 0x04, 32 }, /* r5 */ + { ARMV7M_R6, 0x08, 32 }, /* r6 */ + { ARMV7M_R7, 0x0c, 32 }, /* r7 */ + { ARMV7M_R8, 0x10, 32 }, /* r8 */ + { ARMV7M_R9, 0x14, 32 }, /* r9 */ + { ARMV7M_R10, 0x18, 32 }, /* r10 */ + { ARMV7M_R11, 0x1c, 32 }, /* r11 */ + { ARMV7M_R12, -1, 32 }, /* r12 */ + { ARMV7M_R13, -2, 32 }, /* sp */ + { ARMV7M_R14, -1, 32 }, /* lr */ + { ARMV7M_PC, 0x20, 32 }, /* pc */ + { ARMV7M_xPSR, -1, 32 }, /* xPSR */ }; const struct rtos_register_stacking rtos_chibios_arm_v7m_stacking = { @@ -55,23 +55,23 @@ const struct rtos_register_stacking rtos_chibios_arm_v7m_stacking = { }; static const struct stack_register_offset rtos_chibios_arm_v7m_stack_offsets_w_fpu[ARMV7M_NUM_CORE_REGS] = { - { -1, 32 }, /* r0 */ - { -1, 32 }, /* r1 */ - { -1, 32 }, /* r2 */ - { -1, 32 }, /* r3 */ - { 0x40, 32 }, /* r4 */ - { 0x44, 32 }, /* r5 */ - { 0x48, 32 }, /* r6 */ - { 0x4c, 32 }, /* r7 */ - { 0x50, 32 }, /* r8 */ - { 0x54, 32 }, /* r9 */ - { 0x58, 32 }, /* r10 */ - { 0x5c, 32 }, /* r11 */ - { -1, 32 }, /* r12 */ - { -2, 32 }, /* sp */ - { -1, 32 }, /* lr */ - { 0x60, 32 }, /* pc */ - { -1, 32 }, /* xPSR */ + { ARMV7M_R0, -1, 32 }, /* r0 */ + { ARMV7M_R1, -1, 32 }, /* r1 */ + { ARMV7M_R2, -1, 32 }, /* r2 */ + { ARMV7M_R3, -1, 32 }, /* r3 */ + { ARMV7M_R4, 0x40, 32 }, /* r4 */ + { ARMV7M_R5, 0x44, 32 }, /* r5 */ + { ARMV7M_R6, 0x48, 32 }, /* r6 */ + { ARMV7M_R7, 0x4c, 32 }, /* r7 */ + { ARMV7M_R8, 0x50, 32 }, /* r8 */ + { ARMV7M_R9, 0x54, 32 }, /* r9 */ + { ARMV7M_R10, 0x58, 32 }, /* r10 */ + { ARMV7M_R11, 0x5c, 32 }, /* r11 */ + { ARMV7M_R12, -1, 32 }, /* r12 */ + { ARMV7M_R13, -2, 32 }, /* sp */ + { ARMV7M_R14, -1, 32 }, /* lr */ + { ARMV7M_PC, 0x60, 32 }, /* pc */ + { ARMV7M_xPSR, -1, 32 }, /* xPSR */ }; const struct rtos_register_stacking rtos_chibios_arm_v7m_stacking_w_fpu = { |