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authorIS2T <devel@is2t.com>2013-06-19 08:03:17 +0200
committerSpencer Oliver <spen@spen-soft.co.uk>2013-07-01 08:39:36 +0000
commit34e8d1a50d9ee965e2efa4aae6e2e97caef37c23 (patch)
treef3bab2e71bc54146690943a58588fa464ef02e6b /src/flash/nor/cfi.h
parent434afb370f92898b8803a4883f75ecb9f3f3d931 (diff)
Support for SST 39VF3201C NOR flash
* Add Thumb-2 code to write flash memories that don't support DQ5 polling * Make sure default values for unlock commands are set even if there is no PRI information given by the flash * Add a fixup to disable DQ5 polling for the SST 39VF3201C Change-Id: Ib08cf20547d0f500d5f78241521e6b49050c3d40 Signed-off-by: IS2T development team <dev.is2t@gmail.com> Reviewed-on: http://openocd.zylin.com/1449 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Diffstat (limited to 'src/flash/nor/cfi.h')
-rw-r--r--src/flash/nor/cfi.h4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/flash/nor/cfi.h b/src/flash/nor/cfi.h
index b587ed48..d92fcc0b 100644
--- a/src/flash/nor/cfi.h
+++ b/src/flash/nor/cfi.h
@@ -143,8 +143,8 @@ struct cfi_unlock_addresses {
struct cfi_fixup {
uint16_t mfr;
uint16_t id;
- void (*fixup)(struct flash_bank *bank, void *param);
- void *param;
+ void (*fixup)(struct flash_bank *bank, const void *param);
+ const void *param;
};
#define CFI_MFR_AMD 0x0001