diff options
| author | Øyvind Harboe <oyvind.harboe@zylin.com> | 2011-10-28 17:22:32 +0200 |
|---|---|---|
| committer | Spencer Oliver <spen@spen-soft.co.uk> | 2011-10-31 20:41:18 +0000 |
| commit | 9933fa334de551096674d4044ed7ac2152213e8b (patch) | |
| tree | 113bc2175b24b157556765186e48ab4e17e813c7 /src/flash/nor/cfi.c | |
| parent | 08815946f64ace39b2734dc1a8597d22505f0436 (diff) | |
cfi: unsupported code paths now report and return error
found by clang, would have done something undefined and mysterious
later on.
Change-Id: If7d7aca8514575d229ed0b17378bf8b1bbf347c4
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
Reviewed-on: http://openocd.zylin.com/133
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Diffstat (limited to 'src/flash/nor/cfi.c')
| -rw-r--r-- | src/flash/nor/cfi.c | 33 |
1 files changed, 19 insertions, 14 deletions
diff --git a/src/flash/nor/cfi.c b/src/flash/nor/cfi.c index f75efac3..62d2ae49 100644 --- a/src/flash/nor/cfi.c +++ b/src/flash/nor/cfi.c @@ -1897,13 +1897,15 @@ static int cfi_spansion_write_block(struct flash_bank *bank, uint8_t *buffer, armv4_5_info.common_magic = ARMV7M_COMMON_MAGIC; armv4_5_info.core_mode = ARMV7M_MODE_HANDLER; armv4_5_info.core_state = ARM_STATE_ARM; - } - else + } else if (armv4_5_info.common_magic == ARM_COMMON_MAGIC) { /* All other ARM CPUs have 32 bit instructions */ armv4_5_info.common_magic = ARM_COMMON_MAGIC; armv4_5_info.core_mode = ARM_MODE_SVC; armv4_5_info.core_state = ARM_STATE_ARM; + } else { + LOG_ERROR("Unknown ARM architecture"); + return ERROR_FAIL; } int target_code_size = 0; @@ -1912,11 +1914,12 @@ static int cfi_spansion_write_block(struct flash_bank *bank, uint8_t *buffer, switch (bank->bus_width) { case 1 : - if(armv4_5_info.common_magic == ARM_COMMON_MAGIC) /* armv4_5 target */ - { - target_code_src = armv4_5_word_8_code; - target_code_size = sizeof(armv4_5_word_8_code); + if (armv4_5_info.common_magic != ARM_COMMON_MAGIC) { + LOG_ERROR("Unknown ARM architecture"); + return ERROR_FAIL; } + target_code_src = armv4_5_word_8_code; + target_code_size = sizeof(armv4_5_word_8_code); break; case 2 : /* Check for DQ5 support */ @@ -1936,19 +1939,21 @@ static int cfi_spansion_write_block(struct flash_bank *bank, uint8_t *buffer, else { /* No DQ5 support. Use DQ7 DATA# polling only. */ - if(armv4_5_info.common_magic == ARM_COMMON_MAGIC) // armv4_5 target - { - target_code_src = armv4_5_word_16_code_dq7only; - target_code_size = sizeof(armv4_5_word_16_code_dq7only); + if (armv4_5_info.common_magic != ARM_COMMON_MAGIC) { + LOG_ERROR("Unknown ARM architecture"); + return ERROR_FAIL; } + target_code_src = armv4_5_word_16_code_dq7only; + target_code_size = sizeof(armv4_5_word_16_code_dq7only); } break; case 4 : - if(armv4_5_info.common_magic == ARM_COMMON_MAGIC) // armv4_5 target - { - target_code_src = armv4_5_word_32_code; - target_code_size = sizeof(armv4_5_word_32_code); + if (armv4_5_info.common_magic != ARM_COMMON_MAGIC) { + LOG_ERROR("Unknown ARM architecture"); + return ERROR_FAIL; } + target_code_src = armv4_5_word_32_code; + target_code_size = sizeof(armv4_5_word_32_code); break; default: LOG_ERROR("Unsupported bank buswidth %d, can't do block memory writes", bank->bus_width); |