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| author | Spencer Oliver <spen@spen-soft.co.uk> | 2012-05-15 13:36:11 +0100 |
|---|---|---|
| committer | Spencer Oliver <spen@spen-soft.co.uk> | 2012-05-19 20:29:48 +0000 |
| commit | 323aeaf90b969e6041e4c2c478a5d6e574496b17 (patch) | |
| tree | 904493673abe9df978272e8639c2d0d6793b400f /contrib | |
| parent | 8cb0dae8239a9655eded93b209f18db3fbdbe9d1 (diff) | |
contrib: enable cortex-m0 and cortex-m4 libdcc support
Change-Id: Ib8ff645d1e5b8baca02de8ea95b629d88b203969
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/644
Tested-by: jenkins
Diffstat (limited to 'contrib')
| -rw-r--r-- | contrib/libdcc/dcc_stdio.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/contrib/libdcc/dcc_stdio.c b/contrib/libdcc/dcc_stdio.c index 08a49abf..356ddbda 100644 --- a/contrib/libdcc/dcc_stdio.c +++ b/contrib/libdcc/dcc_stdio.c @@ -29,9 +29,9 @@ #define TARGET_REQ_DEBUGMSG_HEXMSG(size) (0x01 | ((size & 0xff) << 8)) #define TARGET_REQ_DEBUGCHAR 0x02 -#if defined(__ARM_ARCH_7M__) +#if defined(__ARM_ARCH_7M__) || defined(__ARM_ARCH_7EM__) || defined(__ARM_ARCH_6SM__) -/* we use the cortex_m3 DCRDR reg to simulate a arm7_9 dcc channel +/* we use the System Control Block DCRDR reg to simulate a arm7_9 dcc channel * DCRDR[7:0] is used by target for status * DCRDR[15:8] is used by target for write buffer * DCRDR[23:16] is used for by host for status |