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authorSpencer Oliver <spen@spen-soft.co.uk>2012-05-01 09:46:07 +0100
committerSpencer Oliver <spen@spen-soft.co.uk>2012-05-14 09:27:20 +0000
commit1b0c22dd5693233ac348d1f16aed18177e97c010 (patch)
treeb4b1c31c97c0b8a2b138653b1656d053c4309b9a /contrib/loaders/checksum
parent4257cb728c08aa530a50025da3e365e498ebf8e6 (diff)
armv7m: update crc/erase_check loaders for cortex-m0
Use loaders that have been built for cortex-m0, making them usable for both cortex-m0 and cortex-m3 families. Change-Id: Ifd82be87eaec2cb96464290c80800cec3630d619 Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk> Reviewed-on: http://openocd.zylin.com/604 Tested-by: jenkins
Diffstat (limited to 'contrib/loaders/checksum')
-rw-r--r--contrib/loaders/checksum/armv7m_crc.s37
1 files changed, 21 insertions, 16 deletions
diff --git a/contrib/loaders/checksum/armv7m_crc.s b/contrib/loaders/checksum/armv7m_crc.s
index 4a1e8b4a..8dfc40ad 100644
--- a/contrib/loaders/checksum/armv7m_crc.s
+++ b/contrib/loaders/checksum/armv7m_crc.s
@@ -26,41 +26,46 @@
.text
.syntax unified
- .arch armv7-m
+ .cpu cortex-m0
.thumb
.thumb_func
-
+
.align 2
_start:
-main:
+main:
mov r2, r0
- mov r0, #0xffffffff /* crc */
+ movs r0, #0
+ mvns r0, r0
+ ldr r6, CRC32XOR
mov r3, r1
- mov r4, #0
+ movs r4, #0
b ncomp
nbyte:
ldrb r1, [r2, r4]
-
- ldr r7, CRC32XOR
- eor r0, r0, r1, asl #24
- mov r5, #0
+ lsls r1, r1, #24
+ eors r0, r0, r1
+ movs r5, #0
loop:
cmp r0, #0
- mov r6, r0, asl #1
- add r5, r5, #1
- mov r0, r6
- it lt
- eorlt r0, r6, r7
+ bge notset
+ lsls r0, r0, #1
+ eors r0, r0, r6
+ b cont
+notset:
+ lsls r0, r0, #1
+cont:
+ adds r5, r5, #1
cmp r5, #8
bne loop
-
- add r4, r4, #1
+ adds r4, r4, #1
ncomp:
cmp r4, r3
bne nbyte
bkpt #0
+ .align 2
+
CRC32XOR: .word 0x04c11db7
.end