diff options
| author | Paul Fertser <fercerpav@gmail.com> | 2013-11-26 19:46:09 +0400 |
|---|---|---|
| committer | Spencer Oliver <spen@spen-soft.co.uk> | 2014-01-24 12:48:43 +0000 |
| commit | 1137eaedaf6498f3448cdedf6f93076d9b3fd58a (patch) | |
| tree | a68a86bde226531710595395236f10fb0d356df3 | |
| parent | 2efb1f14f611f2ff8a380b703f3e8bcb8a95d1ad (diff) | |
arm920t: fix write memory operations with caches enabled
Commit ff5ec942d80a34e20b5a3ca3328f7e6a55fb309b made this target
always use generic arm7_9 memory write routines for software
breakpoints which resulted in inability to debug and single-step
sources in Gdb when icache is active as generic routine doesn't
invalidate it. This should fix it (and is real-life tested against
Samsung S3C2442). I expect other arm7-9 targets to be affected as
well.
Change-Id: Id7980e370ae4db47ac6b1490321d81ffe85711c0
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/1817
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
| -rw-r--r-- | src/target/arm920t.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/target/arm920t.c b/src/target/arm920t.c index fbfa1703..f6a0f5bf 100644 --- a/src/target/arm920t.c +++ b/src/target/arm920t.c @@ -823,6 +823,7 @@ static int arm920t_init_arch_info(struct target *target, arm7_9->post_debug_entry = arm920t_post_debug_entry; arm7_9->pre_restore_context = arm920t_pre_restore_context; + arm7_9->write_memory = arm920t_write_memory; arm920t->armv4_5_mmu.armv4_5_cache.ctype = -1; arm920t->armv4_5_mmu.get_ttb = arm920t_get_ttb; |