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authorRodrigo L. Rosa <rodrigorosa.LG@gmail.com>2011-08-31 12:32:14 -0700
committerRodrigo L. Rosa <rodrigorosa.LG@gmail.com>2011-08-31 15:45:45 -0700
commitfb164bca55ec5a1c9c70837b576e1d43426cd05b (patch)
tree391f30c10d1593a8315ef9871e6cb4aab983be0c
parentfbbce951402bc08367786f2ba2ce3af549d0d5a5 (diff)
speed up, relocate function
added an attempt to use the non-reseting halting sequence. if it fails, then the full sequence will be attempted. this makes things a bit faster most of the time. changed the location of a function, avoiding a forward def
-rw-r--r--src/target/dsp5680xx.c97
1 files changed, 51 insertions, 46 deletions
diff --git a/src/target/dsp5680xx.c b/src/target/dsp5680xx.c
index 4d2ae497..e56861e4 100644
--- a/src/target/dsp5680xx.c
+++ b/src/target/dsp5680xx.c
@@ -495,6 +495,52 @@ int switch_tap(struct target * target, struct jtag_tap * master_tap,struct jtag_
return retval;
}
+/**
+ * Puts the core into debug mode, enabling the EOnCE module.
+ * This will not always work, eonce_enter_debug_mode executes much
+ * more complicated routine, which is guaranteed to work, but requires
+ * a reset. This will complicate comm with the flash module, since
+ * after a reset clock divisors must be set again.
+ * This implementation works most of the time, and is not accesible to the
+ * user.
+ *
+ * @param target
+ * @param eonce_status Data read from the EOnCE status register.
+ *
+ * @return
+ */
+static int eonce_enter_debug_mode_without_reset(struct target * target, uint16_t * eonce_status){
+ int retval;
+ uint32_t instr = JTAG_INSTR_DEBUG_REQUEST;
+ uint32_t ir_out;//not used, just to make jtag happy.
+ // Debug request #1
+ retval = dsp5680xx_irscan(target,& instr,& ir_out,DSP5680XX_JTAG_CORE_TAP_IRLEN);
+ err_check_propagate(retval);
+
+ // Enable EOnCE module
+ instr = JTAG_INSTR_ENABLE_ONCE;
+ //Two rounds of jtag 0x6 (enable eonce) to enable EOnCE.
+ retval = dsp5680xx_irscan(target, & instr, & ir_out,DSP5680XX_JTAG_CORE_TAP_IRLEN);
+ err_check_propagate(retval);
+ retval = dsp5680xx_irscan(target, & instr, & ir_out,DSP5680XX_JTAG_CORE_TAP_IRLEN);
+ err_check_propagate(retval);
+ // Verify that debug mode is enabled
+ uint16_t data_read_from_dr;
+ retval = eonce_read_status_reg(target,&data_read_from_dr);
+ err_check_propagate(retval);
+ if((data_read_from_dr&0x30) == 0x30){
+ LOG_DEBUG("EOnCE successfully entered debug mode.");
+ target->state = TARGET_HALTED;
+ retval = ERROR_OK;
+ }else{
+ retval = ERROR_TARGET_FAILURE;
+ err_check(retval,"Failed to set EOnCE module to debug mode. Try with halt");
+ }
+ if(eonce_status!=NULL)
+ *eonce_status = data_read_from_dr;
+ return ERROR_OK;
+}
+
#define TIME_DIV_FREESCALE 0.3
/**
* Puts the core into debug mode, enabling the EOnCE module.
@@ -511,6 +557,11 @@ static int eonce_enter_debug_mode(struct target * target, uint16_t * eonce_statu
uint16_t instr_16;
uint16_t read_16;
+ // First try the easy way
+ retval = eonce_enter_debug_mode_without_reset(target,eonce_status);
+ if(retval == ERROR_OK)
+ return retval;
+
struct jtag_tap * tap_chp;
struct jtag_tap * tap_cpu;
tap_chp = jtag_tap_by_string("dsp568013.chp");
@@ -593,52 +644,6 @@ static int eonce_enter_debug_mode(struct target * target, uint16_t * eonce_statu
}
/**
- * Puts the core into debug mode, enabling the EOnCE module.
- * This will not always work, eonce_enter_debug_mode executes much
- * more complicated routine, which is guaranteed to work, but requires
- * a reset. This will complicate comm with the flash module, since
- * after a reset clock divisors must be set again.
- * This implementation works most of the time, and is not accesible to the
- * user.
- *
- * @param target
- * @param eonce_status Data read from the EOnCE status register.
- *
- * @return
- */
-static int eonce_enter_debug_mode_without_reset(struct target * target, uint16_t * eonce_status){
- int retval;
- uint32_t instr = JTAG_INSTR_DEBUG_REQUEST;
- uint32_t ir_out;//not used, just to make jtag happy.
- // Debug request #1
- retval = dsp5680xx_irscan(target,& instr,& ir_out,DSP5680XX_JTAG_CORE_TAP_IRLEN);
- err_check_propagate(retval);
-
- // Enable EOnCE module
- instr = JTAG_INSTR_ENABLE_ONCE;
- //Two rounds of jtag 0x6 (enable eonce) to enable EOnCE.
- retval = dsp5680xx_irscan(target, & instr, & ir_out,DSP5680XX_JTAG_CORE_TAP_IRLEN);
- err_check_propagate(retval);
- retval = dsp5680xx_irscan(target, & instr, & ir_out,DSP5680XX_JTAG_CORE_TAP_IRLEN);
- err_check_propagate(retval);
- // Verify that debug mode is enabled
- uint16_t data_read_from_dr;
- retval = eonce_read_status_reg(target,&data_read_from_dr);
- err_check_propagate(retval);
- if((data_read_from_dr&0x30) == 0x30){
- LOG_DEBUG("EOnCE successfully entered debug mode.");
- target->state = TARGET_HALTED;
- retval = ERROR_OK;
- }else{
- retval = ERROR_TARGET_FAILURE;
- err_check(retval,"Failed to set EOnCE module to debug mode. Try with halt");
- }
- if(eonce_status!=NULL)
- *eonce_status = data_read_from_dr;
- return ERROR_OK;
-}
-
-/**
* Reads the current value of the program counter and stores it.
*
* @param target