diff options
author | Spencer Oliver <ntfreak@users.sourceforge.net> | 2011-07-27 10:56:25 +0100 |
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committer | Spencer Oliver <ntfreak@users.sourceforge.net> | 2011-07-27 10:56:25 +0100 |
commit | b5a324e63c066b97c148c72ecec2e0dfc6023c70 (patch) | |
tree | 18f1414da2c7c94b7ade0250dcfa430041af3bb5 | |
parent | 1cfd3fdda9dc706f002be5e8a1461a82b73ff1f5 (diff) |
cfg: add Fujitsu FM3 config
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
-rw-r--r-- | tcl/target/fm3.cfg | 47 |
1 files changed, 47 insertions, 0 deletions
diff --git a/tcl/target/fm3.cfg b/tcl/target/fm3.cfg new file mode 100644 index 00000000..af7647d8 --- /dev/null +++ b/tcl/target/fm3.cfg @@ -0,0 +1,47 @@ +# MB96F506 +# Fujitsu Cortex-M3 with 512kB Flash and 64kB RAM + +if { [info exists CHIPNAME] } { + set _CHIPNAME $CHIPNAME +} else { + set _CHIPNAME mb9bf500 +} + +if { [info exists ENDIAN] } { + set _ENDIAN $ENDIAN +} else { + set _ENDIAN little +} + +if { [info exists CPUTAPID ] } { + set _CPUTAPID $CPUTAPID +} else { + set _CPUTAPID 0x4ba00477 +} + +# delays on reset lines +jtag_nsrst_delay 100 +jtag_ntrst_delay 100 + +# Fujitsu cortex-M3 reset configuration +reset_config trst_only + +jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID + +set _TARGETNAME $_CHIPNAME.cpu +target create $_TARGETNAME cortex_m3 -endian $_ENDIAN -chain-position $_TARGETNAME + +# MB9BF506 has 64kB of SRAM on its main system bus +$_TARGETNAME configure -work-area-phys 0x1FFF8000 -work-area-size 0x10000 -work-area-backup 0 + +# MB9BF506 has 512kB internal FLASH + +set _FLASHNAME $_CHIPNAME.flash +flash bank $_FLASHNAME fm3 0 0 0 0 $_TARGETNAME + +# 4MHz / 6 = 666kHz, so use 500 +adapter_khz 500 + +# if srst is not fitted use SYSRESETREQ to +# perform a soft reset +cortex_m3 reset_config sysresetreq |