diff options
| author | Oleksij Rempel <linux@rempel-privat.de> | 2015-05-15 09:02:22 +0200 |
|---|---|---|
| committer | Paul Fertser <fercerpav@gmail.com> | 2015-11-30 05:37:56 +0000 |
| commit | f478107d023ffa85177852be5bf9769029d5f307 (patch) | |
| tree | c8dd89ebdf51392361b87f1633b37ae08ee05577 | |
| parent | bfba15a898ae8eb2086f8981fcabf1298ec5c761 (diff) | |
cortex_a: remove ahb support for phys_memory access
Change-Id: I5b7c21c16e95cc1a3160e356d6e64f1f8c449e6e
Signed-off-by: Oleksij Rempel <linux@rempel-privat.de>
Reviewed-on: http://openocd.zylin.com/2795
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
| -rw-r--r-- | src/target/cortex_a.c | 48 |
1 files changed, 14 insertions, 34 deletions
diff --git a/src/target/cortex_a.c b/src/target/cortex_a.c index e2d433a6..33e09662 100644 --- a/src/target/cortex_a.c +++ b/src/target/cortex_a.c @@ -2611,29 +2611,20 @@ static int cortex_a_read_phys_memory(struct target *target, uint32_t count, uint8_t *buffer) { struct armv7a_common *armv7a = target_to_armv7a(target); - struct adiv5_dap *swjdp = armv7a->arm.dap; int retval = ERROR_COMMAND_SYNTAX_ERROR; - uint8_t apsel = swjdp->apsel; + LOG_DEBUG("Reading memory at real address 0x%" PRIx32 "; size %" PRId32 "; count %" PRId32, address, size, count); if (count && buffer) { - - if (armv7a->memory_ap_available && (apsel == armv7a->memory_ap)) { - - /* read memory through AHB-AP */ - retval = mem_ap_sel_read_buf(swjdp, armv7a->memory_ap, buffer, size, count, address); - } else { - - /* read memory through APB-AP */ - if (!armv7a->is_armv7r) { - /* disable mmu */ - retval = cortex_a_mmu_modify(target, 0); - if (retval != ERROR_OK) - return retval; - } - retval = cortex_a_read_apb_ab_memory(target, address, size, count, buffer); + /* read memory through APB-AP */ + if (!armv7a->is_armv7r) { + /* disable mmu */ + retval = cortex_a_mmu_modify(target, 0); + if (retval != ERROR_OK) + return retval; } + retval = cortex_a_read_apb_ab_memory(target, address, size, count, buffer); } return retval; } @@ -2692,32 +2683,21 @@ static int cortex_a_write_phys_memory(struct target *target, uint32_t count, const uint8_t *buffer) { struct armv7a_common *armv7a = target_to_armv7a(target); - struct adiv5_dap *swjdp = armv7a->arm.dap; int retval = ERROR_COMMAND_SYNTAX_ERROR; - uint8_t apsel = swjdp->apsel; LOG_DEBUG("Writing memory to real address 0x%" PRIx32 "; size %" PRId32 "; count %" PRId32, address, size, count); if (count && buffer) { - - if (armv7a->memory_ap_available && (apsel == armv7a->memory_ap)) { - - /* write memory through AHB-AP */ - retval = mem_ap_sel_write_buf(swjdp, armv7a->memory_ap, buffer, size, count, address); - } else { - - /* write memory through APB-AP */ - if (!armv7a->is_armv7r) { - retval = cortex_a_mmu_modify(target, 0); - if (retval != ERROR_OK) - return retval; - } - return cortex_a_write_apb_ab_memory(target, address, size, count, buffer); + /* write memory through APB-AP */ + if (!armv7a->is_armv7r) { + retval = cortex_a_mmu_modify(target, 0); + if (retval != ERROR_OK) + return retval; } + return cortex_a_write_apb_ab_memory(target, address, size, count, buffer); } - /* REVISIT this op is generic ARMv7-A/R stuff */ if (retval == ERROR_OK && target->state == TARGET_HALTED) { struct arm_dpm *dpm = armv7a->arm.dpm; |