OpenOCD/src/flash, branch master

flash/startup.tcl: add STM32G0 and G4 aliases

2020-03-16T15:26:03Z

STM32G0 and G4 uses the same flash driver as the stm32l4x Change-Id: Ic1c4be70aaee809536912e0390f07893efb9a082 Signed-off-by: Tarek BOCHKATI Reviewed-on: http://openocd.zylin.com/5482 Tested-by: jenkins Reviewed-by: Tomas Vanek

Flash driver for STM32G0xx and STM32G4xx

2020-03-16T15:25:10Z

Flash module of STM32G0/G4 family is quite similar to the one of STM32L4, so only minor changes are required, in particular adaption of flash loader to Cortex-M0. Register addresses passed to flash loader to simplify integration of L5. Added re-probe after option byte load. Added flash size override via cfg file. WRPxxR mask now based on max. number of pages instead of fixed 0xFF, as G4 devices fill up unused bits with '1'. Sizes in stm32l4_probe changed to multiples of 1kB. Tested with Nucleo-G071RB, G030J6, Nucleo-G431RB and Nucleo-G474RE. Gap handling in G4 Cat. 3 dual bank mode tested with STM32G473RB. This handling isn't optimal as the bank size includes the size of the gap. WB not tested. Change-Id: I24df7c065afeb71c11c7e96de4aa9fdb91845593 Signed-off-by: Andreas Bolsch Reviewed-on: http://openocd.zylin.com/4807 Tested-by: jenkins Reviewed-by: Tarek BOCHKATI Reviewed-by: Tomas Vanek

flash/stm32h7x: fix bank sizes for devices with trimmed flash

2020-03-10T20:18:47Z

STM32H7yxxI: dual independent 1 MByte banks STM32H7yxxG: dual independent 512 Kbyte banks STM32H7yxxB: single 128 Kbyte bank where y = [4/5] or [A/B] references: (documents are available in www.st.com) - STM32H7[4/5]x[G/I] : DS12110 Rev 7 >> 3.3.1 Embedded Flash memory - STM32H750xB : RM0433 Rev 6 >> Table 11. Flash memory organization on STM32H750xB devices - STM32H7[A/B]x[B/G/I] : RM0455 Rev 3 >> 4.3.4 Flash memory architecture and usage Change-Id: Ic9346964ef2554abf47f5832e25adfdc77bd323e Signed-off-by: Tarek BOCHKATI Reviewed-on: http://openocd.zylin.com/5442 Tested-by: jenkins Reviewed-by: Christopher Head

flash/nor: update support for TI MSP432 devices

2020-03-07T15:32:24Z

Added fixes for issues found in additional code reviews. Fixed host Endianness issues with using buffer reads and writes instead of the *_u32 variants. Changed code that tried to ID banks by hardcode bank_number values to use instead the bank base address. This fixes problems using configurations with multiple devices. Note that this replaces Change 4786 which has been abandoned because of extensive changes to the code to stop IDing banks by name. And I think I really messed up a rebase/merge on the document file. Tested on MSP432P401R, MSP432P4111, and MSP432E401Y Launchpads. Change-Id: Id05798b3aa78ae5cbe725ee762a164d673ee5767 Signed-off-by: Edward Fewell Reviewed-on: http://openocd.zylin.com/5481 Tested-by: jenkins Reviewed-by: Tomas Vanek

bluenrg-x: simplyfied the driver

2020-03-07T15:31:09Z

Adopted only fast algorithm for flash programming: - write_word and write_byte methods have been removed. - start and end write alignments have been defined. Moved flash controller registers offsets in a common file shared with the flash algorithm. - the flash base address is passed to the flash algorithm as a parameter. Removed unused functions Change-Id: I80aeab3994e477044bbcf02e66d9525dae0cb491 Signed-off-by: luca vinci Reviewed-on: http://openocd.zylin.com/5393 Tested-by: jenkins Reviewed-by: Tomas Vanek Reviewed-by: Michele Sardo

bluenrg-x: added support for BlueNRG-LP device

2020-03-07T15:31:02Z

Extended bluenrg-x flash driver with BlueNRG-LP flash controller. Changes include: - register set for the flash controller - made software structure prone to support more easily future devices - updated target config file Change-Id: I2e2dc70db32cf98c62e3a43f2e44a4600a25ac5b Signed-off-by: luca vinci Reviewed-on: http://openocd.zylin.com/5343 Tested-by: jenkins Reviewed-by: Tomas Vanek

helper/binarybuffer: fix clang static analyzer warnings

2020-03-07T15:30:05Z

Writing bits to an uninitialized buffer generated false warnings. Zero buffers before setting them by buf_set_u32|64() (do it only if bit-by-bit copy loop is used, zeroed buffer is not necessary if a fast path write is used) Change-Id: I2f7f8ddb45b0cbd08d3e249534fc51f4b5cc6694 Signed-off-by: Tomas Vanek Reviewed-on: http://openocd.zylin.com/5383 Tested-by: jenkins Reviewed-by: Andreas Fritiofson

flash/nor/numicro: use flash infrastructure to align write

2020-03-07T15:29:03Z

The aligning code generated a clang static analyzer warning and imposed huge memory leak. This part of code was removed and flash infrastructure to alignment is used instead. Not tested on hw! Change-Id: I7c71da87547e71d595a7e7071ae5adcc1cecc827 Signed-off-by: Tomas Vanek Reviewed-on: http://openocd.zylin.com/5367 Tested-by: jenkins Reviewed-by: Oleksij Rempel

flash/nor/fm4,tms470: fix clang static analyzer warnings

2020-03-07T15:28:53Z

Change-Id: I18c1501918d40453fea6aeeb6f035e46d41fc524 Signed-off-by: Tomas Vanek Reviewed-on: http://openocd.zylin.com/5366 Tested-by: jenkins Reviewed-by: Oleksij Rempel

src/flash/nor/at91sam3|4l|7: fix clang static analyzer warnings

2020-03-07T15:28:40Z

Change-Id: I5cd2b2ebb2bd1980bdd1632b5c35bda9718a1089 Signed-off-by: Tomas Vanek Reviewed-on: http://openocd.zylin.com/5365 Tested-by: jenkins Reviewed-by: Oleksij Rempel